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MGA-82563-BLK Ver la hoja de datos (PDF) - HP => Agilent Technologies

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componentes Descripción
Fabricante
MGA-82563-BLK
HP
HP => Agilent Technologies HP
MGA-82563-BLK Datasheet PDF : 12 Pages
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A schematic diagram of the
application circuit is shown in
Figure 15. DC blocking capacitors
(C1 and C2) are used at the input
and output of the MMIC to isolate
the device from adjacent circuits.
While the input terminal of the
MGA-82563 is at ground potential,
it is not a current sink. If the input
is connected to a preceding stage
that has a voltage present, the use
of the DC blocking capacitor (C1)
is required.
RF
Input C1
C2
Vd
C4
RFC
C2
RF
Output
Figure 15. Schematic Diagram.
DC bias is applied to the
MGA-82563 through the RF
Output pin. An inductor (RFC), or
length of high impedance trans-
mission line (preferably λ/4 at the
band center), is used to isolate the
RF from the DC supply.
The power supply is bypassed to
ground with capacitor C3 to keep
RF off of the DC lines and to
prevent gain dips or peaks in the
response of the amplifier.
An additional bypass capacitor,
C4, may be added to the bias line
near the Vd connection to elimi-
nate unwanted feedback through
bias lines that could cause oscilla-
tion. C4 will not normally be
needed unless several stages are
cascaded using a common power
supply.
When multiple bypass capacitors
are used, consideration should be
given to potential resonances. It is
important to ensure that the
capacitors when combined with
additional parasitic L’s and C’s on
the circuit board do not form
resonant circuits. The addition of
a small value resistor in the bias
supply line between bypass
capacitors will often “de-Q” the
bias circuit and eliminate the
effect of a resonance.
The value of the DC blocking and
RF bypass capacitors (C1 - C3)
should be chosen to provide a
small reactance (typically
<5␣ ohms) at the lowest operating
frequency. The reactance of the
RF choke (RFC) should be high
(e.g., several hundred ohms) at
the lowest frequency of operation.
The MGA-82563’s response at low
frequencies is limited to approxi-
mately 100 MHz by the size of
capacitors integrated on the
MMIC chip.
The input and output of the
MGA-82563 are well matched to
50␣ . Without external matching
elements, the input VSWR of the
MGA-82563 is 2.0:1 from
300␣ MHz to 6 GHz and the Output
VSWR is 1.6:1 from 100 MHz
through 6 GHz.
For applications requiring minimum
noise figure (NFo), some improve-
ment over a 50 match is possible
by matching the signal input to the
optimum noise match impedance,
Γo, as specified in the “Typical
Noise Parameters” table. The data
in the table shows the noise match
to be very close to 50 .
The completed application
amplifier with all components and
SMA connectors is shown in
Figure 16.
H
C1
IN
MGA-8-A
OUT
C2
RFC
C3
+V
C4
Figure 16. Complete Application Circuit.
6-214

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