X68C75 Ver la hoja de datos (PDF) - Xicor -> Intersil

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X68C75

Port Expander and E2 Memory

Xicor -> Intersil 

X68C75 SLIC® E2

Figure 7. On-Chip Registers

7

6

5

4

3

2

1

0

0400

1

0

A15 A14 A13 A12 A11 A10 SFRM*

Special Function Register

Memory Map Register

0408 MSB

LSB PDRB

Port Data Register B

0410 MSB

LSB PDRA

Port Data Register A

0418

INT INTA INTB ENA ENB ENEE 0 EOW ISR

Interrupt Status Register

0420 IRST 1 AWO BWO DIRA DIRB STRA STRB CR

Configuration Register

0428 MSB

LSB PPRB

Port Pin Register B

0430 MSB

LSB PPRA

Port Pin Register A

0438

0 LAM 0 RST A15 A14 A13 EEM*

E2 Memory Map Register

0600 MSB

LSB

16 Bytes General Purpose SRAM

060F MSB

LSB

NOTE: * The value returned by reading these registers is the complement

of the actual data. These registers are nonvolatile and a special SDP

sequence is used to alter their contents. All the other registers are

initialized by a valid reset input signal and when the device is power cycled.

2899 ILL F07.3C

7

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