WM8725ED Ver la hoja de datos (PDF) - Wolfson Microelectronics plc

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WM8725ED

99dB Stereo DAC

Wolfson Microelectronics plc 

WM8725

Production Data

The outputs of the 2 DACs are buffered out of the device by buffer amplifiers. These

amplifiers will source load current of several mA and sink current up to 1.5mA, so allowing

significant loads to be driven. The output source is active and the sink is Class A, i.e. fixed

value, so greater loads might be driven if an external ‘pull-down’ resistor is connected at the

output.

Typically an external low pass filter circuit will be used to remove residual sampling noise of

the 64x oversampling used and if desired adjust the signal amplitude and device strength.

SERIAL DATA INTERFACE

WM8725 has serial interface formats that are fully compatible with both normal (MSB first,

right-justified) and I2S interfaces. The data format is selected with the FORMAT pin. When

FORMAT is LOW, normal data format is selected. When the format is HIGH, I2S format is

selected. It must be noted that in “packed” mode operation (exactly 32 BCLKs per LRCIN

period), the data word must align exactly with LRCIN clock edges (effectively both left and

right justified at the same time). This is true in both normal and I2S modes.

FORMAT

0

1

DESCRIPTION

Normal format

(MSB-first, right justified)

I2S format

(Philips serial data protocol)

Table 3 Serial Interface Formats

1/fs

LRCIN

LEFT CHANNEL

BCKIN

Audio Data Word = 16-Bit

DIN

123

MSB

Figure 1 ‘Normal’ Data Input Timing

14 15 16

LSB

1/fs

RIGHT CHANNEL

123

MSB

14 15 16

LSB

LRCIN

LEFT CHANNEL

BCKIN

Audio Data Word = 16-Bit

DIN

123

MSB

Figure 2 I2S Data Input Timing

14 15 16

LSB

RIGHT CHANNEL

1 23

MSB

14 15 16

LSB

w

PD Rev 4.1 August 2004

8

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