WM2616CD Ver la hoja de datos (PDF) - Wolfson Microelectronics plc

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WM2616CD

12-bit Serial Input Voltage Output DAC

Wolfson Microelectronics plc 

Production Data Rev 1.0

SERIAL INTERFACE

tWL

tWH

SCLK

1

tSUD

tHD

DIN

D15

tSUCSFS

NCS

tWHFS

tSUFS

2

D14

3

D13

FS

WM2616

4

5 15

16

D12

D1

D0

tSUC16CS

tSUC16FS

Figure 1 Timing Diagram

Test Conditions:

RL = 10kΩ, CL = 100pF. VDD = 5V ± 10%, VREF = 2.048V and VDD = 3V ± 10%, VREF = 1.024V over recommended operating free-air

temperature range (unless noted otherwise).

SYMBOL TEST CONDITIONS

MIN

tSUCSFS

Setup time NCS low before negative FS edge.

10

tSUFS

Setup time FS low before first negative SCLK edge.

8

Setup time, sixteenth negative SCLK edge after FS low

tSUC16FS

on which D0 is sampled before rising edge of FS.

10

Setup time, sixteenth positive SCLK edge (first positive

after D0 sampled) before NCS rising edge. If FS is used

tSUC16CS

instead of the sixteenth positive edge to update the DAC,

10

then the setup time is between the FS rising edge and

the NCS rising edge.

tWH

Pulse duration, SCLK high.

25

tWL

Pulse duration, SCLK low.

25

tSUD

Setup time, data ready before SCLK falling edge.

8

tHD

Hold time, data held valid after SCLK falling edge.

5

tWHFS

Pulse duration, FS high.

20

TYP

MAX

UNIT

ns

ns

ns

ns

ns

ns

ns

ns

ns

WOLFSON MICROELECTRONICS LTD

Production Data Rev 1.0 June 1999

5

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