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WED3C7410E16M400BC Ver la hoja de datos (PDF) - White Electronic Designs Corporation

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WED3C7410E16M400BC
WEDC
White Electronic Designs Corporation WEDC
WED3C7410E16M400BC Datasheet PDF : 13 Pages
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White Electronic Designs WED3C7410E16M-XBX
RISC Microprocessor Multichip Package
OVERVIEW
The WEDC 7410E/SSRAM multichip package is targeted
for high performance, space sensitive, low power systems
and supports the following power management features:
doze, nap, sleep and dynamic power management.
The WED3C7410E16M-XBX multichip package consists
of:
7410E AltiVecRISC processor
Dedicated 2MB SSRAM L2 cache, configured as
256Kx72
21mmx25mm, 255 Ceramic Ball Grid Array (CBGA)
Maximum Core frequency = 400, 450MHz
Maximum L2 Cache frequency = 200MHz
Maximum 60x Bus frequency = 133MHz**
The WED3C7410E16M-XBX is offered in Commercial
(0°C to +70°C), industrial (-40°C to +85°C) and military
(-55°C to +125°C) temperature ranges and is well suited
for embedded applications such as missiles, aerospace,
flight computers, fire control systems and rugged critical
systems.
* This product is subject to change without notice.
** At a maximum 60x bus frequency of 133MHz, the maximum
configurable core frequency is 400MHz.
FEATURES
Footprint compatible with WED3C7558M-XBX and
WED3C750A8M-200BX
Implementation of Altivectechnology instruction
set
Optional, high-bandwidth MPX bus interface
FIGURE 1 – MULTI-CHIP PACKAGE DIAGRAM
AltiVecis a trademark of Motorola Inc.
May 2006
Rev. 9
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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