WED3C7410E16M-400BX Ver la hoja de datos (PDF) - White Electronic Designs Corporation

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WED3C7410E16M-400BX

RISC Microprocessor Multichip Package

White Electronic Designs Corporation 

White Electronic Designs WED3C7410E16M-400BX

PLL POWER SUPPLY FILTERING

The AVdd and L2AVdd power signals are provided on

The circuit should be placed as close as possible to the

the WED3C7410E16M-400BX to provide power to the

AVdd pin to minimize noise coupled from nearby

clock generation phase-locked loop and L2 cache

circuits. An identical but separate circuit should be

delay-locked loop respectively. To ensure stability of

placed as close as possible to the L2AVdd pin. It is

the internal clock, the power supplied to the AVdd

often possible to route directly from the capacitors to

input signal should be filtered of any noise in the

the AVdd pin, which is on the periphery of the 255 BGA

500kHz to 10 MHz resonant frequency range of the

footprint, without the inductance of vias. The L2AVdd

PLL. A circuit similar to the one shown in Figure 6

pin may be more difficult to route but is proportionately

using surface mount capacitors with minimum Effective

less critical.

Series Inductance (ESL) is recommended. Multiple

small capacitors of equal value are recommended over

a single large value capacitor.

FIG. 6 POWER SUPPLY FILTER CIRCUIT

10 Ω

Vdd

AVdd (or L2AVdd)

2.2 µF

2.2 µF

Low ESL surface mount capacitors

GND

11

White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com

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