W9864G6GH Ver la hoja de datos (PDF) - Winbond

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componentes Descripción

Fabricante

W9864G6GH

1M ×4 BANKS ×16 BITS SDRAM

Winbond 

W9864G6GH

1. GENERAL DESCRIPTION

W9864G6GH is a high-speed synchronous dynamic random access memory (SDRAM), organized as

1M words × 4 banks × 16 bits. Using pipelined architecture and 0.11 µm process technology,

W9864G6GH delivers a data bandwidth of up to 400M bytes per second. For different application,

W9864G6GH is sorted into the following speed grades: -5, -6/-6I, -7/-7S. The -5 parts can run up to

200MHz/CL3. The -6/-6I parts can run up to 166MHz/CL3. The -7/-7S parts can run up to

143MHz/CL3. And the grade of –7S with tRP=18nS.

Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be

accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE

command. Column addresses are automatically generated by the SDRAM internal counter in burst

operation. Random column read is also possible by providing its address at each clock cycle.

The multiple bank nature enables interleaving among internal banks to hide the precharging time.By

having a programmable Mode Register, the system can change burst length, latency cycle, interleave

or sequential burst to maximize its performance. W9864G6GH is ideal for main memory in high

performance applications.

2. FEATURES

• 3.3V± 0.3V for -5/-6/-6I grade power supply

2.7V～3.6V for -7/-7S grade power supply

• 1,048,576 words × 4 banks × 16 bits organization

• Self Refresh Current: Standard and Low Power

• CAS Latency: 2 & 3

• Burst Length: 1, 2, 4, 8 and full page

• Sequential and Interleave Burst

• Byte data controlled by LDQM, UDQM

• Auto-precharge and controlled precharge

• Burst read, single write operation

• 4K refresh cycles/64 mS

• Interface: LVTTL

• Packaged in TSOP II 54-pin, 400 mil

• W9864G6GH is using Lead free materials

Publication Release Date:Aug. 13, 2007

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Revision A09

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