VSC834UB Ver la hoja de datos (PDF) - Vitesse Semiconductor

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componentes Descripción

Fabricante

VSC834UB

2.5Gb/s 17x17 Crosspoint Switch with Input Signal Activity (ISA) Monitoring

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

2.5Gb/s 17x17 Crosspoint Switch

with Input Signal Activity (ISA) Monitoring

Figure 1: Detailed Block Diagram:

Datasheet

VSC834

A, AN[16:0]

17x17

Switch Core

17

Program Memory

Control Interface

DATA[4:0], ADDR[5:0]

ALE, CSB, WRB, RDB INTB,

MONCLK, CONFIG

Y, YN[16:0]

Functional Description

Data Paths

All input data must be differential and biased to PECL levels. On-chip terminations are provided, with a

nominal impedance of 50Ω. All input termination resistors are tied to VTERM.

Data outputs are provided through differential current switches with on-chip terminations that produce a

PECL level output swing. The drive level of the output circuit is designed to produce standard PECL levels

when terminated in 50Ω to 2.0V. Other termination voltages are possible, such as to VCC or 1.3V, but the volt-

age level of the output swing will be shifted from its nominal value. The common-mode voltage of the output

swing can be adjusted using the VCOM pin. The adjustment range is not calibrated, but typically allows for

about +200mV of adjustment in the output common-mode voltage.

Output channels can be powered off in pairs if fewer than 17 outputs are required. By connecting the VEE

pin associated with a given pair of outputs to VCC, the output pairs will pull to VCC and chip power will be

reduced by roughly 200mW.

Page 2

© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012

Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

G52247-0, Rev 4.2

02/09/01

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