VDP313XY Ver la hoja de datos (PDF) - Micronas
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VDP313XY Datasheet PDF : 76 Pages
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ADVANCE INFORMATION
VDP 313xY
Video Processor Family
1. Introduction
The VDP 313xY is a video IC family of high-quality sin-
gle-chip video processors. Modular design and a sub-
micron technology allow the economic integration of
features in all classes of TV sets. The VDP 313xY fam-
ily is based on the VDP 31xxB including YCRCB inputs
for DVD component signals.
The main features of the VDP 3130Y are
1.1. Features
Video Decoding and Processing
– four CVBS, one S-VHS input,
one YCRCB component input
– integrated high-quality A/D converters and associ-
ated clamp and AGC circuits
– adaptive 2H comb filter Y/C separator
– multistandard color decoder PAL/NTSC/SECAM
including all substandards
– multistandard sync decoder
– automatic standard recognition
– black-line detector
– linear horizontal scaling (0.25...4), as well as nonlin-
ear horizontal scaling “Panoramavision”
– black-level expander
– dynamic peaking
– soft limiter (gamma correction)
– color transient improvement
RGB Processing and Deflection
– programmable RGB matrix
– two analog RGB / Fastblank inputs
– half-contrast switch
– picture frame generator
– scan velocity modulation output
– high-performance H/V deflection
– separate ADC for tube measurements
– EHT compensation
– angle and bow correction
– one 20.25 MHz crystal, few external components
– I2C-Bus Interface
– 64-pin PSDIP package
1.2. System Architecture
Fig. 1–1 shows the block diagram of the video proces-
sor
CIN1
CIN2/CRIN
CBIN
VIN1
VIN2
VIN3
VIN4
VOUT
Analog
Frontend
AGC,
2×8 bit ADC
2H
Adaptive
Combfilter
Color
Decoder
NTSC,
PAL,
SECAM
Horizontal
Scaler
Panorama
Mode
Display
Processor
RGB Matrix,
CLUT,
Scan Veloc.
Analog
Backend
3×10 bit DAC,
Tube Control,
RGB Switch
SVM
RGB/FB IN1
RGB/FB IN2
Half Contrast
RGB OUT
Clock Gen.
DCO
I2C
I2C
Fig. 1–1: Block diagram of the VDP 313xY
Sync and Deflection
H/V/EW
Measurement
ADC
Sense
Micronas
5
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