UPD63335 Ver la hoja de datos (PDF) - NEC => Renesas Technology
Número de pieza
componentes Descripción
Fabricante
UPD63335 Datasheet PDF : 56 Pages
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µ PD63335
PIN FUNCTIONS
Pin No.
Symbol
I/O
Function
(1/2)
1
DVDD1
−
Digital power supply
2
XTL_IN
I
Crystal resonator connection pin/external master clock input (see 1.3 Clock)
3
XTL_OUT
O
Crystal resonator connection pin. Leave this pin open when using an external master
clock.
4
DVSS1
5
SI
6
BIT_CLK
−
Digital ground
I
Data input for serial data interfaceNote
I/O
Bit sync clock for serial data interfaceNote
7
DVSS2
−
Digital ground
8
SO
O
Data output for serial data interface
9
DVDD2
10
LRCLK
_______
11
RESET
−
Digital power supply
I/O
Frame sync clock for serial data interfaceNote
I
Reset signal input. Sets reset mode when low.
12
IN6
I
Analog audio monaural input 6
13
IN5
I
Analog audio monaural input 5
14
IN3L
I
Analog audio input 3, L channel
15
IN3R
I
Analog audio input 3, R channel
16
IN2L
I
Analog audio input 2, L channel
17
IN2R
I
Analog audio input 2, R channel
18
IN1L
I
Analog audio input 1, L channel
19
IN1_GND
−
AC ground pin for IN1. Generally connect to AVSS via a 1 µF capacitor.
20
IN1R
I
Analog audio input 1, R channel
21
MIC1
I
MIC input 1
22
MIC2
I
MIC input 2
23
IN4L
I
Analog audio input 4, L channel
24
IN4R
I
Analog audio input 4, R channel
25
AVDD1
−
Analog power supply
26
AVSS1
−
Analog ground
27
Vref
−
Reference voltage output for connecting bypass capacitor
28
NC
−
Not used. Leave this pin open.
29
AFILT1
−
ADC L channel anti alias filter pin
30
AFILT2
−
ADC R channel anti alias filter pin
31
NC
−
Not used. Leave this pin open.
32
NC
−
Not used. Leave this pin open.
33
NC
−
Not used. Leave this pin open.
34
NC
−
Not used. Leave this pin open.
Note The SI, BIT_CLK, and LRCLK pins are neither pulled up nor pulled down within the LSI. Since malfunction
may occur if these pins are somehow set to high impedance, pull-up or pull-down should be performed
externally, via a resistor.
4
Data Sheet S15003EJ6V0DS
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