UPD161623 Ver la hoja de datos (PDF) - NEC => Renesas Technology
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UPD161623 Datasheet PDF : 84 Pages
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µ PD161623
3. PIN FUNCTIONS
3.1 Power Supply System Pins
Symbol
Pin Name
Pad No. I/O
Function
VDD1
VDD2
VS
VSS
V0 to V5
VRH
VRL1, VRL2
Logic power supply
I/O power supply
Driver power supply
Ground
Power supply for
γ-curve correction
77, 95
96, 108, 109
103, 104
94, 97, 98, 105
120 to 125,
119,
126, 127
− Power supply pin for logic circuit
− Power supply pin for I/O buffer
− Power supply pin for driver circuit
− Ground pin for logic and driver circuits
− The µ PD161623 includes power supplies and registers for the γ-curve, so if
the characteristics of the γ-curve and LCD panel in the µ PD161623 match,
leave V0 to V5, VRH, VRL1, VRL2 open.
If some kind of correction is required, adjust the γ-curve by connecting
registers between the V0 to V5, VRH, VRL1, VRL2 pins (see 5.9 γ-Curve
Correction Power Supply Circuit).
VDD1 (MODE) Mode setting pull-up 81, 85
−
power supply
VDD2 (MODE) Mode setting pull-down 42, 116
−
power supply
VSS (MODE) Mode setting ground
35, 44, 46, 48, 68, −
Pull-up power supply pin for mode setting
Pull-down power supply pin for mode setting
Ground pin for mode setting
74, 79, 83, 113,
118, 128, 140
3.2 Logic System Pins
Symbol
Pin Name
Pad No.
PSX0
CPU interface selection 80
/CS
Chip select
69
/RESET Reset
70
/RD
Read
73
(E)
(Enable)
/WR
Write
72
(R, /W)
(Read/write)
C86
Select interface
82
I/O
Function
Input This pin is used to select the CPU interface mode.
(1/2)
PSX0
H
L
CPU Interface Mode
18-bit parallel interface
16-bit parallel interface
Input This pin is used for chip select signals. When /CS = L, the chip is active and
can perform data input/output operations including command and data I/O.
Input When /RESET is L, an internal reset is performed. The reset operation is
executed at the /RESET signal level. Be sure to perform reset via this pin at
power application.
Input When i80 series parallel data transfer (/RD) has been selected, the signal at
this pin is used to enable read operations. Data is output to the data bus
only when this pin is low.
When M68 series parallel data transfer (E) has been selected, the signal at
this pin is used to enable read/write operations.
Input When i80 series parallel data transfer (/WR) has been selected, the signal at
this pin is used to enable write operations. Data is written at the rising edge
of this signal.
When M68 series parallel data transfer (R, /W) and serial data has been
selected, this pin is used to determine the direction of data transfer.
L: Write
H: Read
Input This pin is used to switch between interface modes (i80 series CPU or M68
series CPU).
L: Selects i80 series CPU mode
H: Selects M68 series CPU mode
8
Data Sheet S15817EJ2V0DS
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