UPD17201AGF Ver la hoja de datos (PDF) - NEC => Renesas Technology
Número de pieza
componentes Descripción
Fabricante
UPD17201AGF
NEC => Renesas Technology
UPD17201AGF Datasheet PDF : 120 Pages
| |||
µPD17201A, 17207
(cont’d)
Pin No.
58
59
60
61
62
63
64
65
66
67
68
69
71
70
72
73
74
75
Symbol
P1A0/SCK
P1A1/SO
P1A2/SI
REM
VDD
XIN
XOUT
RESET
VREG
WDOUT
XTIN
XTOUT
VLCDC
VLCD0
VLCD1
VLCD2
CAPH
CAPL
Function
Output Type On Reset
Port 1A or serial interface.
Port 1A and serial interface are switched by SIOEN of the register file.
• P1A0 to P1A2
• 3-bit I/O port
• Enabling setting of inputs or outputs of 3 bits
(Grouped I/O).
• SCK, SO, SI
• SCK : Serial clock I/O
• SO : Serial data output
• SI : Serial data input
CMOS,
push-pull
Input
Signal output to an infrared remote controller.
Active-high output.
CMOS,
push-pull
Low-level
output
Positive power supply
–
–
These pins are connected to a 4-MHz ceramic or crystal oscillator
for main clock oscillation.
–
(Oscillation
stops)
System reset input.
System is reset when low level is input to this pin.
While this pin is low, oscillation of main clock is stopped.
A pull-up resistor can be connected by mask option.
–
Input
Output of the voltage regulator for the subclock oscillation circuit.
–
–
Connect external 0.1-µF capacitor to this pin when using the
subclock.
Output for detection of a program overrun.
This pin outputs a low level when an overflow in the watchdog timer
or an overflow/underflow in the stack is detected.
Connect this pin to the RESET pin
N-ch
open drain
High-
impedance
These pins are connected to a 32.768-kHz crystal oscillator for
subclock oscillation.
–
(Oscillates)
Input to regulate the reference voltage to LCD driver.
–
–
Reference voltage outputs to LCD driver.
• VLCD0: Reference voltage output
• VLCD1: Doubler output (Two times the reference voltage)
• VLCD2: Tripler output (Three times the reference voltage)
–
–
These pins are connected to a capacitor to boost the LCD drive
voltage.
–
–
10
Share Link: