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UPD16780N Ver la hoja de datos (PDF) - NEC => Renesas Technology

Número de pieza
componentes Descripción
Fabricante
UPD16780N
NEC
NEC => Renesas Technology NEC
UPD16780N Datasheet PDF : 16 Pages
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µ PD16780
Cautions 1. To prevent latch-up-breakdown, the power should be turned on in order VDD1, Logic input VDD2,
video signal input. It should be turned off in the opposite order. This relationship should be
followed during transition periods as well.
2. The sampling of the video signal of this IC is only the simultaneous 3 output sampling of C1, C2,
C3. Incidentally, it is designing abound of the input of the video signal in 10 MHz MAX.
If a video signal with a higher frequency is input, the data may not be correctly displayed.
3. Insert a capacitor of 0.1 µ F between VDD1 and VSS1, and VDD2 and VSS2. Unless the power supply
is reinforced, the supply voltage may fluctuate, making the sampling voltage abnormal.
4. If noise is superimposed on the start pulse pin, the data may not be displayed. For this reason,
be sure to input CX signal during the vertical blanking period.
5. If the start pulse width is extended by half the clock or longer, the sampling start timing SHP1
does not change from normal timing; therefore, the sampling operation is performed normally.
Data Sheet S12608EJ1V0DS00
5

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