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UPD16750N Ver la hoja de datos (PDF) - NEC => Renesas Technology

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UPD16750N Datasheet PDF : 24 Pages
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µPD16750
Cautions 1. The power start sequence must be VDD1, logic input, and VDD2 & V0 to V15 in that order.
Reverse this sequence to shut down (Simultaneous power application to VDD2 and V0 to V15 is
possible.).
2. To stabilize the supply voltage, please be sure to insert a 0.1-µF bypass capacitor between
VDD1-VSS1 and VDD2-VSS2. Furthermore, for increased precision of the D/A converter, insertion
of a bypass capacitor of about 0.01 µF is also advised between the γ -corrected power supply
terminals (V0, V1, V2,....., V15) and VSS2.
Data Sheet S13719EJ4V0DS00
5

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