UPD12115 Ver la hoja de datos (PDF) - NEC => Renesas Technology

Número de pieza

componentes Descripción

Fabricante

UPD12115

1.5 V/1.0 A GENERAL-PURPOSE CMOS REGULATOR

NEC => Renesas Technology 

DATA SHEET

MOS INTEGRATED CIRCUIT

μ PD12115

1.5 V/1.0 A GENERAL-PURPOSE

CMOS REGULATOR

DESCRIPTION

μ PD12115 is a general-purpose CMOS regulator which has 1.5 V output voltage and 1.0 A output current capacity.

This product is suitable for low power-supply-voltage LSI etc. By ON/OFF function, the power consumption can be

kept low level at the time of off-state.

FEATURES

• Output Current: 1.0 A

• Output Voltage: 1.5 V (Fixed type)

PIN CONFIGURATION (Marking Side)

5-PIN TO-252 (5-PIN MP-3ZK)

• Output Voltage Tolerance: VO ± 2.0% (TJ = 25°C)

6

1. INPUT

• Dropout Voltage: VDIF = 1.0 V MAX. (IO = 1.0 A)

2. ON/OFF

• Quiescent Current: 150 μ A TYP. (IO = 0 A)

3. GND Note

• Standby Current: 1 μ A

• Available for laminated ceramic capacitor: (Electric capacity 10 μ F or higher)

1 2 345

4. NC

5. OUTPUT

• On-chip over-current protection circuit

6. GND (Fin)

• On-chip thermal shut down circuit

Note No.3 pin is cut and can not be connected

to substrate. No.6 is Fin and common to

APPLICATIONS

GND pin.

This regulator is suitable for low power-supply-voltage LSI which is used in digital appliances etc.

BLOCK DIAGRAM

−

Buffer

+

Constant Reference

Current

voltage

ON/OFF

Over-current

protection

−

Error

amp.

+

VIN

ON/OFF

VOUT

Triming

Thermal

shut down

GND

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all products and/or types are available in every country. Please check with an NEC Electronics

sales representative for availability and additional information.

Document No. G18851EJ1V0DS00 (1st edition)

Date Published July 2007 NS

Printed in Japan

2007

Share Link: