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UPC8104GR-E1 Ver la hoja de datos (PDF) - NEC => Renesas Technology

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UPC8104GR-E1 Datasheet PDF : 20 Pages
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µPC8104GR
PIN EXPLANATION
PIN ASSIGN- SUPPLY PIN
NO. MENT
VOL. (V) VOL.(V) FUNCTION AND APPLICATION
EQUIPMENT CIRCUIT
1
Lo1in
0
Lo1 input for phase shifter.
This input impedance is 50
matched internally.
1
50
2
Lo1in
2.4 Bypass of Lo1 input.
This pin is grounded through
2
internal capacitor.
Open in case of single ended.
3
GND for
0
modulator
Connect to the ground with
minimum inductance.
Track length should be kept as
short as possible.
4
I
VCC/2
Input for I signal. This input
impedance is larger than 20 k.
Relations between amplitude
and VCC/2 bias of input signal
are following.
VCC/2 (v) Amp. (mVp-p) Note
1.35
400
4
5
1.5
600
1.75
1000
5
I
VCC/2
6
Q
VCC/2
7
Q
VCC/2
16
MODout
Input for I signal. This input
impedance is larger than 20 k.
VCC/2 biased DC signal should
be input.
Input for Q signal. This input
impedance is larger than 20 k.
VCC/2 biased DC signal should
be input.
Input for Q signal. This input
impedance is larger than 20 k.
Relations between amplitude
and VCC/2 bias of input signal
7
are following.
VCC/2 (v)
1.35
1.5
1.75
Amp. (mVp-p) Note
400
600
1000
1.5 Output from modulator.
This is emitter follower output.
6
16
Note In case of that I/Q input signals are single ended.
Of course, I/Q signal inputs can be used either single endedly or differentially with proper terminations.
Data Sheet P10099EJ4V0DS00
5

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