UPA1819 Ver la hoja de datos (PDF) - NEC => Renesas Technology
Número de pieza
componentes Descripción
Fabricante
UPA1819 Datasheet PDF : 8 Pages
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µ PA1819
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
IDSS
IGSS
VGS(off)
| yfs |
RDS(on)1
VDS = −30 V, VGS = 0 V
VGS = m20 V, VDS = 0 V
VDS = −10 V, ID = −1.0 mA
VDS = −10 V, ID = −6.0 A
VGS = −10 V, ID = −6.0 A
Input Capacitance
RDS(on)2
RDS(on)3
Ciss
VGS = −4.5 V, ID = −6.0 A
VGS = −4.0 V, ID = −6.0 A
VDS = −10 V
Output Capacitance
Coss
VGS = 0 V
Reverse Transfer Capacitance
Crss f = 1.0 MHz
Turn-on Delay Time
Rise Time
td(on)
VDD = −15 V, ID = −6.0 A
tr
VGS = −10 V
Turn-off Delay Time
td(off)
RG = 10 Ω
Fall Time
Total Gate Charge
tf
QG
VDD = −24 V
Gate to Source Charge
QGS
VGS = −10 V
Gate to Drain Charge
QGD
ID = −12 A
Body Diode Forward Voltage
VF(S-D) IF = 12 A, VGS = 0 V
Reverse Recovery Time
trr
IF = 12 A, VGS = 0 V
Reverse Recovery Charge
Qrr
di/dt = 100 A/µs
MIN. TYP. MAX. UNIT
−1.0 µA
m10 µA
−1.0 −2.0 −2.5 V
11 23
S
9.8 12 mΩ
13.9 18.5 mΩ
16.4 22 mΩ
2430
pF
690
pF
420
pF
19
ns
17
ns
160
ns
160
ns
45
nC
5.5
nC
15
nC
0.83
V
50
ns
40
nC
TEST CIRCUIT 1 SWITCHING TIME
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
RG
PG.
VGS(−)
0
τ
τ = 1µs
Duty Cycle ≤ 1%
RL
VDD
VGS(−)
VGS
Wave Form
10%
0
VDS(−)
90%
VDS
VDS
0
Wave Form
td(on)
VGS
90%
90%
10% 10%
tr td(off)
tf
ton
toff
D.U.T.
IG = −2 mA
RL
PG.
50 Ω
VDD
2
Data Sheet G16267EJ1V0DS
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