UPA1774 Ver la hoja de datos (PDF) - NEC => Renesas Technology
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UPA1774 Datasheet PDF : 8 Pages
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1774
SWITCHING
DUAL P-CHANNEL POWER MOS FET
DESCRIPTION
The µ PA1774 is Dual P-channel MOS Field Effect
Transistor.
FEATURES
• Dual chip type
• Low on-state resistance
RDS(on)1 = 250 mΩ MAX. (VGS = –10 V, ID = –2.0 A)
RDS(on)2 = 300 mΩ MAX. (VGS = –4.5 V, ID = –2.0 A)
RDS(on)3 = 330 mΩ MAX. (VGS = –4.0 V, ID = –2.0 A)
• Low input capacitance
Ciss = 420 pF TYP.
• Built-in G-S protection diode
• Small and surface mount package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
PACKAGE
µ PA1774G
Power SOP8
PACKAGE DRAWING (Unit: mm)
8
5
1
4
5.37 MAX.
1 : Source 1
2 : Gate 1
7, 8 : Drain 1
3 : Source 2
4 : Gate 2
5, 6 : Drain 2
6.0 ±0.3
4.4
0.8
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.10
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V) VDSS
–60
V
Gate to Source Voltage (VDS = 0 V) VGSS
m20
V
Drain Current (DC) (TC = 25°C)
ID(DC)
m2.8
A
Drain Current (pulse) Note1
ID(pulse)
m18
A
Total Power Dissipation (1 unit) Note2
PT
0.6
W
Total Power Dissipation (2 unit) Note2
PT
0.8
W
Channel Temperature
Tch
150
°C
Storage Temperature
Single Avalanche Current Note3
Single Avalanche Energy Note3
Tstg
–55 to 150 °C
IAS
–2.8
A
EAS
0.78
mJ
EQUIVALENT CIRCUIT
(1/2 circuit)
Drain
Gate
Body
Diode
Gate
Protection
Diode
Source
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Mounted on Glass Epoxy Board of 1600 mm2 x 1.6 mm. Drain pad size: 264 mm2 x 35 µm, TA = 25°C
3. Starting Tch = 25°C, VDD = –30 V, RG = 25 Ω, VGS = –20→0 V
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. G15380EJ2V0DS00 (2nd edition)
Date Published June 2002 NS CP(K)
Printed in Japan
©
2001
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