UJA1069 Ver la hoja de datos (PDF) - NXP Semiconductors.
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UJA1069 Datasheet PDF : 64 Pages
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NXP Semiconductors
5. Pinning information
5.1 Pinning
UJA1069
LIN fail-safe system basis chip
n.c. 1
n.c. 2
TXDL 3
V1 4
RXDL 5
RSTN 6
INTN 7
EN 8
SDI 9
SDO 10
SCK 11
SCS 12
n.c. 13
n.c. 14
n.c. 15
TEST 16
UJA1069TW
32 BAT42
31 SENSE
30 V3
29 SYSINH
28 n.c.
27 BAT14
26 RTLIN
25 LIN
24 n.c.
23 GND
22 n.c.
21 n.c.
20 n.c.
19 n.c.
18 WAKE
17 INH/LIMP
001aad676
Fig 2. Pin configuration (HTSSOP32)
n.c. 1
TXDL 2
V1 3
RXDL 4
RSTN 5
INTN 6
EN 7
SDI 8
SDO 9
SCK 10
SCS 11
TEST 12
UJA1069TW24
24 BAT42
23 SENSE
22 V3
21 SYSINH
20 n.c.
19 BAT14
18 RTLIN
17 LIN
16 n.c.
15 GND
14 WAKE
13 INH/LIMP
001aad677
Fig 3. Pin configuration (HTSSOP24)
UJA1069_4
Product data sheet
Rev. 04 — 28 October 2009
© NXP B.V. 2009. All rights reserved.
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