MX7575 Ver la hoja de datos (PDF) - Maxim Integrated

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Fabricante

MX7575

CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs

Maxim Integrated 

CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs

40 TA = +25°C

42

44

46

48

50

52

54

100

1k

10k

100k

INPUT FREQUENCY (Hz)

Figure 13. MX7575 SNR vs. Input Frequency

2.5 A: TA = +125°C

B: TA = +85°C

2.0 C: TA = +25°C

1.5

1.0

AB C

0.5

0

10

100

1000

CONVERSION TIME (µs)

10000

Figure 14. MX7575 Accuracy vs. Conversion Time

+5V

3.3k

+

ICL8069

_

1.23V

+

47µF

REF

0.1µF

Figure 15. External Reference Circuit

The decoupling capacitors are necessary to provide a

low AC source impedance.

Internal/External Clock

The MX7575/MX7576 can be run with either an exter-

nally applied clock or their internal clock. In either case,

the signal appearing at the clock pin is internally divid-

ed by two to provide an internal clock signal that is rela-

tively insensitive to the input clock duty cycle.

Therefore, a single conversion takes 20 input clock

cycles, which corresponds to 10 internal clock cycles.

Internal Clock

The internal oscillator frequency is set by an external

capacitor, CCLK, and an external resistor, RCLK, which

are connected as shown in Figure 16a. During a con-

version, a sawtooth waveform is generated on the CLK

pin by charging CCLK through RCLK and discharging it

through an internal switch. At the end of a conversion,

the internal oscillator is shut down by clamping the CLK

pin to VDD through an internal switch. The circuit for the

internal oscillator can easily be overdriven with an

external clock source.

The internal oscillator provides a convenient clock

source for the MX7575. Figure 17 shows typical conver-

sion times versus temperature for the recommended

RCLK and CCLK combination. Due to process varia-

tions, the oscillation frequency for this RCLK/CCLK com-

bination may vary by as much as ±50% from the

nominal value shown in Figure 17. Therefore, an exter-

nal clock should be used in the following situations:

1) Applications that require the conversion time to be

within 50% of the minimum conversion time for the

specified accuracy (5µs MX7575/10µs MX7576).

2) Applications in which time-related software con-

straints cannot accommodate conversion-time differ-

ences that may occur from unit to unit or over

temperature for a given device.

External Clock

The CLK input of the MX7575/MX7576 may be driven

directly by a 74HC or 4000B series buffer (e g., 4049),

or by an LS TTL output with a 5.6kΩ pull-up resistor. At

the end of a conversion, the device ignores the clock

input and disables its internal clock signal. Therefore,

the external clock may continue to run between conver-

sions without being disabled. The duty cycle of the

external clock may vary from 30% to 70%. As dis-

cussed previously, in order to maintain accuracy, clock

rates significantly lower than the data sheet limits

(4MHz for MX7575 and 2MHz for MX7576) should not

be used.

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