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MX7575 Ver la hoja de datos (PDF) - Maxim Integrated

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Fabricante
MX7575 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs
TIMING CHARACTERISTICS (Note 5)
(VDD = +5V, VREF = 1.23V, AGND = DGND = 0V.)
PARAMETER
SYMBOL CONDITIONS
CS to RD Setup Time
RD to BUSY Propagation Time
Data-Access Time after RD
RD Pulse Width
CS to RD Hold Time
Data-Access Time after BUSY
Data-Hold Time
BUSY to CS Delay
t1
t2
t3
(Note 6)
t4
t5
t6
(Note 6)
t7
(Note 7)
t8
TA = +25°C
ALL
MIN MAX
0
100
100
100
0
80
10
80
0
TA = TMIN to TMAX
J/K/A/B
S/T
MIN MAX
MIN MAX
0
0
100
120
100
120
100
120
0
0
80
100
10
80
10
100
0
0
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
Note 5: Timing specifications are sample tested at +25°C to ensure compliance. All input control signals are specified with
tr = tf = 20ns (10% to 90% of +5V) and timed from a voltage level of 1.6V.
Note 6: t3 and t6 are measured with the load circuits of Figure 1 and defined as the time required for an output to cross 0.8V or 2.4V.
Note 7: t7 is defined as the time required for the data lines to change 0.5V when loaded with the circuits of Figure 2.
______________________________________________________________Pin Description
PIN
DIP/SO PLCC
1
2
2
3
3
4
4
5
6
7, 8
9
10–13
14
15
16
17
18
—
5
6
7
8, 9
10
12–15
16
17
18
19
20
1, 11
NAME
FUNCTION
CS Chip Select Input. CS must be low for the device to be selected or to recognize the RD input.
RD
Read Input. RD must be low to access data. RD is also used to start conversions. See the
Microprocessor Interface section.
TP
(MX7575)
Test Point. Connect to VDD.
MODE Mode Input. MODE = low puts the ADC into its asynchronous conversion mode. MODE has to be
(MX7576) tied high for the synchronous conversion mode and the ROM interface mode.
BUSY
BUSY Output. BUSY going low indicates the start of a conversion. BUSY going high indicates the
end of a conversion.
CLK External Clock Input/Internal Oscillator Pin for frequency setting RC components.
D7 Three-State Data Output, bit 7 (MSB)
D6, D5 Three-State Data Outputs, bits 6 and 5
DGND Digital Ground
D4–D1 Three-State Data Outputs, bits 4–1
D0 Three-State Data Output, bit 0 (LSB)
AGND Analog Ground
AIN Analog Input. 0V to 2VREF input range.
REF Reference Input. +1.23V nominal.
VDD Power-Supply Voltage. +5V nominal.
N.C. No Connect
4 _______________________________________________________________________________________

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