IDT71256SA45 Ver la hoja de datos (PDF) - Integrated Device Technology
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IDT71256SA45 Datasheet PDF : 7 Pages
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IDT71256SA
CMOS STATIC RAM 256K (32K x 8-BIT) IN PE PACKAGES
COMMERCIAL TEMPERATURE RANGE
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ± 10%)
71256SA15
71256SA20
Symbol
Read Cycle
Parameter
Min. Max. Min. Max.
tRC
Read Cycle Time
15
—
20
—
tAA
Address Access Time
—
15
—
20
tACS
tCLZ(1)
tCHZ(1)
Chip Select Access Time
Chip Select to Output in Low-Z
Chip Deselect to Output in High-Z
—
15
—
20
4
—
4
—
0
7
0
10
tOE
tOLZ(1)
tOHZ(1)
Output Enable to Output Valid
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
—
7
—
10
0
—
0
—
0
6
0
8
tOH
tPU(1)
tPD(1)
Output Hold from Address Change
Chip Select to Power Up Time
Chip Deselect to Power Down Time
3
—
3
—
0
—
0
—
—
15
—
20
Write Cycle
tWC
Write Cycle Time
15
—
20
—
tAW
Address Valid to End of Write
10
—
15
—
tCW
Chip Select to End of Write
10
—
15
—
tAS
Address Set-up Time
0
—
0
—
tWP
Write Pulse Width
10
—
15
—
tWR
Write Recovery Time
0
—
0
—
tDW
Data Valid to End of Write
7
—
11
—
tDH
tOW(1)
tWHZ(1)
Data Hold Time
Output Active from End of Write
Write Enable to Output in High-Z
0
—
0
—
4
—
4
—
0
6
0
10
NOTE:
1. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
71256SA25
Min. Max. Unit
25
— ns
—
25 ns
—
25 ns
4
— ns
0
11 ns
—
11 ns
0
— ns
0
10 ns
3
— ns
0
— ns
—
25 ns
25
— ns
20
— ns
20
— ns
0
— ns
20
— ns
0
— ns
13
— ns
0
— ns
4
— ns
0
11 ns
3605 tbl 08
4
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