74VHC4046(1999) Ver la hoja de datos (PDF) - Fairchild Semiconductor

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Fabricante

74VHC4046
(Rev.:1999)

CMOS Phase Lock Loop

Fairchild Semiconductor 

Typical Performance Characteristics (Continued)

VHC4046 Typical VCO Linearity vs R1 & C1

VHC4046 Typical VCO Linearity vs R1 & C1

VCO WITHOUT OFFSET

R2 = ∞

VCO WITH OFFSET

Comparator I

R2=∞

–Given: fO

–Use fO with curve titled

center frequency vs R1, C

to determine R1 and C1

R2≠∞

–Given: fO and fL

–Calculate fMIN from the

equation fMIN = fO − fL

–Use fMIN with curve titled

offset frequency vs R2, C

to determine R2 and C1

–Calculate fMAX/fMIN from

the equation fMAX/fMIN =

fO + fL/fO − fL

–Use fMAX/fMIN with curve

titled fMAX/fMIN vs R2/R1

to determine ratio R2/R1

to obtain R1

Comparator II & III

R2=∞

–Given: fMAX

–Calculate fO from the

equation fO = fMAX/2

–Use fO with curve titled

center frequency vs R1, C

to determine R1 and C1

R2≠∞

–Given: fMIN and fMAX

–Use fMIN with curve titled

offset frequency vs R2,

C to determine R2 and C1

–Calculate fMAX/fMIN

–Use fMAX/fMIN with curve

titled fMAX/fMIN vs R2/R1

to determine ratio R2/R1

to obtain R1

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