Switching Characteristics (Ta = 25 °C, VCC = 5 V)
Characteristic
Symbol
Propagation delay time
(H→ L)
Propagation delay time
(L→ H)
Common mode transient
immunity at logic HIGH output
(Note 1)
Common mode transient
immunity at logic LOW output
(Note 1)
tpHL
tpLH
CMH
CML
Test
Cir-
Test Condition
cuit
IF = 0→ 16 mA
RL = 1.9 kΩ
Fig1
IF = 16→ 0 mA
RL = 1.9 kΩ
Fig2
IF = 0 mA
VCM = 400 Vp−p
RL = 1.9 kΩ
IF = 16 mA
VCM = 400 Vp−p
RL = 1.9 kΩ
TLP719
Min
Typ.
Max Unit
―
―
0.8
μs
―
―
0.8
μs
10000
―
― V / μs
−10000 ―
― V / μs
Note 1 : CML is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic LOW
state (VO < 0.8 V).
CMH is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic
HIGH state (VO >2.0 V).
Figure 1. Switching Time Test Circuit
PULSE INPUT
( PW = 100 μs
IF 1
→
6
Duty = 10%)
2
5
3
4
IF MONITORING NODE
SHIELD
VCC = 5 V
RL
VO
IF
MONITORING NODE
0.1 μF
VO
tpHL
1.5V
tpLH
5V
VOL
Figure 2. Common Mode Noise Immunity Test Circuit.
→IF 1
6
SW
2
5
AB
3
4
SHIELD
+
−
VCM
VCC=5V
RL=1.9kΩ
VO
VCM
tr
0.1μF
VOH
SW:B (IF= 0 mA)
VOL
SW:A (IF = 16 mA)
400 V
90%
10%
tf
0V
CMH
2V
0.8 V
CML
320 (V)
CMH = tr (μs)
320 (V)
CML = − tf (μs)
© 2019
4
Toshiba Electronic Devices & Storage Corporation
2019-06-03