CD22100
Test Circuits and Waveforms (Continued)
VDD
500µF
ID
0.1µF
105
TA = 25oC
1
2
CD4029
CLK Q3
3
CLK
Q4
4
Q2
5
16
S
104
15
14
CL
13
CL
103
12
VDD = 15V
10V
10V
5V
Q1
6
11
7
10
102
CL
8
9
CL
VSS
NOTE:
CLOSE SWITCH S AFTER APPLYING VDD
10
102
CL = 50pF
CL = 15pF
103
104
105
106
SWITCHING FREQUENCY (Hz)
FIGURE 4. DYNAMIC POWER DISSIPATION TEST CIRCUIT AND TYPICAL DYNAMIC POWER
DISSIPATION AS A FUNCTION OF SWITCHING FREQUENCY
ON
VIS
SW
10kΩ
VOS
50pF
SW = ANY CROSSPOINT
STROBE = DATA - IN = VDD
VDD
VIS
50%
0
tPLH
VDD
VOS
50%
0
50%
tPLH
50%
FIGURE 5. PROPAGATION DELAY TIME TEST CIRCUIT AND
WAVEFORMS (SIGNAL INPUT TO SIGNAL OUTPUT,
SWITCH ON)
CONTROLS
VIS
1kΩ
SW
VOS
10kΩ
CONTROL
SW = ANY CROSSPOINT
VDD
0
50mV
VOS
0
-50mV
FIGURE 6. TEST CIRCUIT AND WAVEFORMS FOR
CROSSTALK (CONTROL INPUT TO SIGNAL
OUTPUT)
0
TA = 25oC
-20 VDD = 10V
VIS = 10VP-P SINE WAVE
CL = 50pF
-40 RL = 1kΩ
ON
-60
VIS
SW
1kΩ
1kΩ
OFF
-80
SW = ANY CROSSPOINT
SW
VOS
1kΩ
-100
-120
102
103
104
105
106
INPUT SIGNAL FREQUENCY (Hz)
FIGURE 7. TEST CIRCUIT AND TYPICAL CROSSTALK BETWEEN SWITCH CIRCUITS IN
THE SAME PACKAGE AS A FUNCTON OF SIGNAL FREQUENCY
4-190