PCD3316T/F2 Ver la hoja de datos (PDF) - Philips Electronics
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PCD3316T/F2 Datasheet PDF : 30 Pages
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Philips Semiconductors
PCD3316
CIDCW receiver
6.2 Pin description
Table 2: Pin description
Symbol
Pin I/O
U HXIN
1
I
HXOUT
2
O
n IRQ
3
O
SCL
4
I
re SDA
5
I/O
LXIN
6
I
sLXOUT
7
O
tDGND
8
−
rAGND
9
−
iPOL1
10 I
c POL0
11 I
t LOWBAT
12 I
ed CASIN
13 I
Description
3.58 MHz crystal oscillator input
3.58 MHz crystal oscillator output
interrupt output; programmable active HIGH or active LOW
serial clock line of I2C-bus
serial data line of I2C-bus
32.768 kHz crystal oscillator input
32.768 kHz crystal oscillator output
digital ground
analog ground
polarity detector input 1
polarity detector input 0
low battery detector input
input pin for CAS signal
FSKIN−
14 I
negative input for FSK signal
FSKIN+
15 I
positive input for FSK signal
VDD
16 −
supply
7. Functional description
7.1 Preprocessor and analog inputs
The preprocessor for the CAS detection and the FSK receiver incorporates an
Analog-to-Digital Converter (ADC) and a digital bandpass filter.
The LOWBAT input of the PCD3316 can be used for low battery detection. The
voltage on the LOWBAT pin is compared with an internal voltage reference circuit.
When the LOWBAT voltage drops below the reference voltage, the Status register,
bit 5 is set to logic 1.
The PCD3316 can be forced in a Power-down state by switching off the 3.58 MHz
system clock and the ADC. This is done by setting Mode register 2, bit 7 (CIDMD2.7)
to logic 0. To guarantee correct operation the following order of actions must be
performed (see also Section 7.8 about interrupts):
1. Switch off CAS and FSK detection (if turned on)
2. Read the interrupt register (thus clearing pending interrupts generated by the
CAS and FSK detector)
3. Switch off the 3.58 MHz oscillator by clearing bit 7 of Mode register 2.
The two low power comparators (inputs POL0 and POL1) and the 32.768 kHz clock
are always active.
9397 750 04824
Product specification
11 March 1999
© Philips Electronics N.V. 1999. All rights reserved.
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