TDA9109/N Ver la hoja de datos (PDF) - STMicroelectronics
Número de pieza
componentes Descripción
Fabricante
TDA9109/N Datasheet PDF : 32 Pages
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TDA9109/N
B+ SECTION
Operating Conditions
Symbol
Parameter
FeedRes Minimum Feedback Resistor
Test conditions
Resistor between Pins 15 and 14
Min. Typ. Max. Unit
5
kΩ
Electrical Characteristics (VCC = 12V, Tamb = 25oC)
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
OLG Error Amplifier Open Loop Gain At low frequency (see Note 16)
85
dB
UGBW Unity Gain Bandwidth
(see Note 16)
6
MHz
IRI
EAOI
Regulation Input Bias Current
Error Amplifier Output Current
Current sourced by Pin 15 (PNP base)
Current sourced by Pin 14
Current sunk by Pin 14
0.2
µA
0.5 mA
2 mA
CSG Current Sense Input Voltage Gain Pin 16
3
MCEth Max Current Sense Input Threshold Pin 16
Voltage
1.2
V
ISI Current Sense Input Bias Current Current sunk by Pin 16 (NPN base)
1
µA
Tonmax Maximum ON Time of the external % of Horizontal period,
power transistor
f0 = 27kHz (see Note 17)
100
%
B+OSV B+ Output Saturation Voltage
V28 with I28 = 10mA
0.25
V
IVREF Internal Reference Voltage
On erroramp (+) input for Subaddress 0B
4.8
V
Byte 1000000
VREFADJ I nt e rna l R ef er en ce V ol t ag e Byte 1111111
Adjustment Range
Byte 0000000
+20
%
-20
%
PWMSEL Threshold for step-up/step-down
selection
Pin 16
6
V
tFB+ Fall Time
Pin 28
100
ns
Notes : 16. These parameters are not tested on each unit. They are measured during our internal qualification procedure which includes
characterization on batches coming from corners of our processes and also temperature characterization.
17. The external power transistor is OFF during 400ns of the HFOCUSCAP discharge.
Figure 1 : Vertical Dynamic Focus Function
Figure 2 : E/W Output
VDFAMP
B
A
HDFDC
Figure 3 : Dynamic Horizontal Phase Control
Output
B
EWPARA
A
EWDC
Figure 4 : Keystone Effect on E/W Output
(PCC Inhibited)
B
A
SPBPARA
DHPCDC
Keyadj
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