TDA9109SN Ver la hoja de datos (PDF) - STMicroelectronics

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TDA9109SN

LOW-COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS

STMicroelectronics 

TDA9109/SN

B+ SECTION

Operating Conditions

Symbol

Parameter

FeedRes Minimum Feedback Resistor

Test conditions

Resistor between Pins 15 and 14

Min. Typ. Max. Unit

5

kΩ

Electrical Characteristics (VCC = 12V, Tamb = 25oC)

Symbol

Parameter

Test conditions

OLG Error Amplifier Open Loop Gain

At low frequency (see Note 16)

ICOMP

Sunk Current on Error Amplifier Pin 14 (see Figure 14)

Output when BO UT is in safety

condition

UGBW Unity Gain Bandwidth

(see Note 13)

IRI Regulation Input Bias Current

Current sourced by Pin 15 (PNP base)

EAOI Error Amplifier Output Current

Current sourced by Pin 14

Current sunk by Pin 14

CSG Current Sense Input Voltage Gain Pin 16

MCEth Max Current Sense Input Threshold Pin 16

Voltage

ISI Current Sense Input Bias Current

Current sourced by Pin 16 (PNP base)

Tonmax Maximum ON Time of the external % of Horizontal period,

power transistor

f0 = 27kHz (see Note 17)

B+OSV B+ Output Saturation Voltage

V28 with I28 = 10mA

IVREF Internal Reference Voltage

On erroramp (+) inputfor Subaddress 0B

Byte 1000000

VREFADJ I nt e rna l R e f e r en ce V ol t ag e Byte 1111111

Adjustment Range

Byte 0000000

tFB+ Fall Time

Pin 28

Min.

Typ.

85

0.5

6

0.2

3

1.2

1

100

0.25

4.8

+20

-20

100

Max.

0.5

2

Unit

dB

mA

MHz

µA

mA

mA

V

µA

%

V

V

%

%

ns

Notes : 13. These parameters are not tested on each unit. They are measured during our internal qualification.

16. These parameters are not tested on each unit. They are measured during our internal qualification procedure which includes

characterization on batches coming from corners of our processes and also temperature characterization.

17. The external power transistor is OFF during about 400ns.

Figure 1 : Vertical Dynamic Focus Function

Figure 2 : E/W Output

VDFAMP

B

A

HDFDC

Figure 3 : Dynamic Horizontal Phase Control

Output

B

EWPARA

A

EWDC

Figure 4 : Keystone Effect on E/W Output

(PCC and Corner Inhibited)

B

A

SPBPARA

DHPCDC

Keyadj

11/30

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