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TDA3603 Ver la hoja de datos (PDF) - Philips Electronics

Número de pieza
componentes Descripción
Fabricante
TDA3603
Philips
Philips Electronics Philips
TDA3603 Datasheet PDF : 20 Pages
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Philips Semiconductors
Multiple voltage regulator with switch
Product specification
TDA3603
FUNCTIONAL DESCRIPTION
The TDA3603 is a multiple output voltage regulator with a
power switch, intended for use in car radios with or without
a microcontroller. Because of low-voltage operation of the
car radio, low-voltage drop regulators are used.
Regulator 2 will switch on when the supply voltage
exceeds 6.5 V for the first time and will switch off again
when the output voltage of regulator 2 is below 1.9 V (this
is below an engine start). When regulator 2 is switched on
and the output voltage of this regulator is within its voltage
range, the reset output will be enabled (reset will go HIGH
via a pull-up resistor) to generate a reset to the
microcontroller. The reset cycles can be extended by an
external capacitor at the reset output (pin 3). The start-up
feature is built-in to ensure a smooth start-up of the
microcontroller at first connection, without uncontrolled
switching of regulator 2 during the start-up sequence.
When both regulator 2 and the supply voltage (VP > 4.5 V)
are available, regulator 1 and the switch can be operated
by an enable input (pin 4).
All output pins are fully protected. The regulators are
protected against load dump (regulator 1 will switch off at
supply voltages higher than 25 V) and short-circuit
(foldback current protection).
The switch contains a current protection which is delayed
for 10 ms (in short-circuit condition). During this time the
current is limited to 1.4 A (VP 18 V).
At supply voltages over 16.9 V the switch is clamped at
15.0 V (to avoid externally connected circuitry being
damaged by an overvoltage) and the switch will switch off
at load dump.
Interfacing with the microcontroller can be accomplished
by an ignition Schmitt trigger and ignition output buffer,
(simple full/semi on/off logic applications).
The total timing of a semi on/off logic set is shown Fig.4.
1997 Aug 15
6

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