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CXD3017Q Ver la hoja de datos (PDF) - Sony Semiconductor

Número de pieza
componentes Descripción
Fabricante
CXD3017Q Datasheet PDF : 117 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
(3) SCLK pin
XLAT
SCLK
Serial Read Out Data
(SENS)
tDLS
tSPW
1/fSCLK
MSB
...
...
CXD3017Q
LSB
Item
SCLK frequency
SCLK pulse width
Delay time
Symbol
fSCLK
tSPW
tDLS
Min.
31.3
15
Typ.
Max.
16
Unit
MHz
ns
µs
(4) COUT, MIRR and DFCT pins
Operating frequency
(VDD = AVDD = 3.3 ± 0.3V, VSS = AVSS = 0V, Topr = –20 to +75°C)
Item
Symbol Min. Typ. Max. Unit
COUT maximum operating frequency fCOUT 40
kHz
MIRR maximum operating frequency fMIRR
40
kHz
DFCT maximum operating frequency fDFCTH 5
kHz
Conditions
1
2
3
1 When using a high-speed traverse TZC.
2
B
A
When the RF signal continuously satisfies the following conditions during the above traverse.
A = 0.11VDD to 0.23VDD
A
B
+
B
25%
3 During complete RF signal omission.
When settings related to DFCT signal generation are Typ.
– 10 –

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