CXD1254AR Ver la hoja de datos (PDF) - Sony Semiconductor
Número de pieza
componentes Descripción
Fabricante
CXD1254AR Datasheet PDF : 21 Pages
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CXD1254AR/AQ
Pin No.
Pin
I/O
LQFP QFP
Function
41 43 CLP1
O Pulse output for clamp
42 44 CLP2
O Pulse output for clamp
43 45 CLP3
O Pulse output for clamp
44 46 CLP4
O Pulse output for clamp
45 47 PBLK
O Blanking/cleaning pulse output
46 48 ID
O Line discrimination pulse output
47 49 VDD
— Power supply for timing generator
48 50 TEST1
I Test input/H reset pulse input
49 51 FLD
I/O Field pulse output/V reset pulse input
50 52 HTSG
I XSG1, 2 controller/Test input
51 53 VDD
— Power supply for signal generator
52 54 EXT
Synchronization mode selection.
I
“Low”: Internal “High”: External
53 55 VSS
— GND for signal generator
54 56 TEST2
I Test input (Normally open)
55 57 NC
— Used open
56 58 VDD
— Power supply for signal generator
57 59 NC
— Used open
58 60 TEST3
I Test input (Normally fixed at “Low”)
59 61 VSS
— GND for signal generator
60 62 NC
— Used open
61 63 NC
— Used open
62 64 BF
O Burst flag pulse output
63 1 CBLK
O Composite blanking pulse output
64 2 SYNC
O Composite synchronization pulse output
(Note) ∗1…Output determined by mode setting.
∗2…Function determined by mode setting.
∗2
∗2
∗2
(Pull-down resistor)
(Pull-down resistor)
Outputs for Pins Determined by Mode Setting
∗1
Pin No.
Pin
(LQFP)
XSHP
33
O
XSHD
34
O
XSP1
35
O
XSP2
36
O
XDL1
37
O
XDL2
38
O
D3 (Pin 6)
Low (Color)
XSHP ( ) output
O
XSHD ( ) output
O
XSP1 ( ) output
O
XSP2 ( ) output
O
XDL1 output
O
XDL2 output
O
High (B/W)
SHP ( ) output
SHD ( ) output
(Out put stopped)
(Out put stopped)
(Out put stopped)
(Out put stopped)
—6—
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