SY88992L Ver la hoja de datos (PDF) - Micrel

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SY88992L

3.3V, 4.25Gbps VCSEL Driver

Micrel 

Micrel, Inc.

SY88992L

Driver’s Special Features

The SY88992L features a peaking current of

programmable amplitude and duration on both the

rising and the falling edges. The amplitude of the

peaking current is adjustable in steps of 5% of the

modulation current from 0% to 35%. As shown in the

table on page 3, the ratio between the peaking current

and the modulation current (IP/IMOD) can be

programmed by connecting pin 6 (IP_SET1) and/or pin

7 (IP_SET2) and/or pin 8 (IP_SET3) to ground. When

all these three pins are left open, there is no peaking

(ratio 0%). When they’re all connected to ground the

ratio is maximum (35%).

For each family of VCSELs used with the driver, the

user must try many combinations in order to get the

best response for the VCSEL. The peaking current

duration can be tuned by installing a resistor between

pin 14 and ground; 0Ω provides maximum duration

and 3kΩ or higher provides the minimum duration. The

combined features will improve the VCSEL response

for a better optical signal quality. The electrical eye

diagrams on page 8 show how the signal changes as

the peaking-to-modulation current varies.

Application Hints

The typical application section on the front page shows

how to connect the driver to the VCSEL single-ended.

To improve transition time and VCSEL response, the

VCSEL can be driven differentially, as shown in Figure

3. Driving the VCSEL differentially will also minimize

the cross talk with the rest of the circuitry on the board,

especially with the receiver.

The driver is always AC-coupled to the VCSEL and the

headroom of the driver is determined by the pull-up

network at the output. In Figure 3, the modulation

current out of the driver is split between the pull-up

network and the VCSEL. If, for example, the total pull-

up resistor is twice the sum of the damping resistor

and VCSEL equivalent series resistance, only two

thirds (2/3) of the modulation current will be used by

the VCSEL. Therefore, to maximize the modulation

current going through the VCSEL, the total pull-up

resistors should be kept as high as possible. One

solution consists of using an inductor alone as pull-up,

creating a high impedance path for the modulation

current and zero ohm (0Ω) path for the DC current.

This offers a headroom equal to VCC for the driver

and almost all the modulation current goes into the

VCSEL. However, using the inductor alone will cause

signal distortion. To avoid this, a combination of

resistors and inductors can be used, as shown on

figure 3. In this case, the headroom of the driver is

VCC–R1 x αIMOD, where αIMOD is the portion of the

modulation current that goes through the pull-up

network. For instance, if a modulation current out of

the driver of 25mA is considered, with a pull-up

resistor of 75Ω, and the VCSEL with the damping

resistor total resistance is 50Ω, then the modulation

current will split; 10mA to the pull-up resistor and

15mA to the laser. The headroom for the driver will be

VCC–75 x 10 = VCC–750mV which is way higher than

the minimum voltage required for the output stage of

the driver to operate properly.

The coupling capacitor creates a low-frequency cutoff

in the circuit. Therefore, a proper coupling capacitor

value must be chosen to accommodate different data

rates in the application. If the value of the capacitor is

too high, it may cause problems in high data rate

applications. If its value is too small, it won’t be able to

hold a constant charge between the first bit and the

last bit in a long string of identical bits in low data rate

application. Both cases lead to higher pattern-

dependent jitter in the transmitter signal. 0.1µF is

found to be good for applications from 155Mbps to

4.25Gbps.

Figure 3. Driving a Common Anode VCSEL Differentially

January 2006

10

M9999-011306-A

hbwhelp@micrel.com or (408) 955-1690

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