E-STLC3075 Ver la hoja de datos (PDF) - STMicroelectronics
Número de pieza
componentes Descripción
Fabricante
E-STLC3075 Datasheet PDF : 36 Pages
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Pin description
2
Pin description
Figure 2. Pin connection (top view)
STLC3075
44 43 42 41 40 39 38 37 36 35 34
D0
1
D1
2
D2
3
PD
4
GAIN SET
5
N.C.
6
DET
7
CKTTX
8
CTTX1
9
CTTX2
10
RTTX
11
33
ILTF
32
RD
31
RTH
30
IREF
29
RLIM
28
AGND
27
CVCC
26
VPOS
25
RSENSE
24
GATE
23
CLK
12 13 14 15 16 17 18 19 20 21 22
D00TL488
Table 2. Pin description
N°
Pin
Function
1
2
3
4
5
6, 22, 38,
39, 40, 42
7
8
9
10
11
12
13
14
15
D0
D1
D2
PD
Gain SET
Control interface: input bit 0
Control interface: input bit 1
Control interface: input bit 2
Power down input. Normally connected to CVCC (or to logic level high)
Control gain interface: 0 Level Rxgain = 0dB Txgain = -12dB
1 Level Rxgain = +6dB Txgain = -12dB
NC
Not connected
DET
CKTTX
CTTX1
CTTX2
RTTX
FTTX
RX
ZAC1
ZAC
Logic interface output of the supervision detector (active low)
Metering pulse clock input (12 kHz or 16 kHz square wave)
Metering burst shaping external capacitor
Metering burst shaping external capacitor
Metering pulse cancellation buffer output. TTX filter network should be connected to
this point. If not used, should be left open.
Metering pulse buffer input this signal is sent to the line and used to perform TTX
filtering
4 wires input port (RX input). A 100 kΩ external resistor must be connected to AGND
via the bias input stage. This signal refers to AGND. If connected to single supply
CODEC output it must be DC decoupled with proper capacitor.
RX buffer output (the AC impedance is connected from this node to ZAC)
AC impedance synthesis
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