STH10NA50FI Ver la hoja de datos (PDF) - STMicroelectronics

Número de pieza

componentes Descripción

Fabricante

STH10NA50FI

N - CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR

STMicroelectronics 

STH10NA50/FI

STW10NA50

N - CHANNEL ENHANCEMENT MODE

FAST POWER MOS TRANSISTOR

TYPE

STH10NA50

STH10NA50FI

STW10NA50

VDSS

500 V

500 V

500 V

R DS( on)

< 0.8 Ω

< 0.8 Ω

< 0.8 Ω

ID

9.6 A

5.6 A

9.6 A

s TYPICAL RDS(on) = 0.7 Ω

s ± 30V GATE TO SOURCE VOLTAGE RATING

s 100% AVALANCHE TESTED

s REPETITIVE AVALANCHE DATA AT 100oC

s LOW INTRINSIC CAPACITANCES

s GATE GHARGE MINIMIZED

s REDUCED THRESHOLD VOLTAGE SPREAD

DESCRIPTION

This series of POWER MOSFETS represents the

most advanced high voltage technology. The

optimized cell layout coupled with a new

proprietary edge termination concur to give the

device low RDS(on) and gate charge, unequalled

ruggedness and superior switching performance.

APPLICATIONS

s HIGH CURRENT, HIGH SPEED SWITCHING

s SWITCH MODE POWER SUPPLIES (SMPS)

s DC-AC CONVERTERS FOR WELDING

EQUIPMENT AND UNINTERRUPTIBLE

POWER SUPPLIES AND MOTOR DRIVE

ABSOLUTE MAXIMUM RATINGS

Symbol

P ar amete r

VD S Drain-source Voltage (VGS = 0)

VDG R Drain-gate Voltage (RG S = 20 kΩ)

VGS Gate-source Voltage

ID

Drain Current (continuous) at T c = 25 oC

ID

Drain Current (continuous) at T c = 100 oC

IDM(•) Drain Current (pulsed)

Ptot Total Dissipation at Tc = 25 oC

Derating Factor

VISO Insulation Withstand Voltage (DC)

Tstg Storage Temperature

Tj

Max. Operating Junction Temperature

(•) Pulse width limited by safe operating area

November 1996

TO-247

3

2

1

TO-218

3

3

2

2

1

1

ISOWATT218

INTERNAL SCHEMATIC DIAGRAM

Val ue

STW/STH10NA50 STH10NA50FI

500

500

± 30

9.6

5.6

6.1

3.5

38

38

150

60

1.2

0. 48



4000

-65 to 150

150

Unit

V

V

V

A

A

A

W

W/oC

V

oC

oC

1/11

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