ST20184 Ver la hoja de datos (PDF) - STMicroelectronics
Número de pieza
componentes Descripción
Fabricante
ST20184
STMicroelectronics
ST20184 Datasheet PDF : 7 Pages
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Figure 3. Block Diagram of ST20184
ST20190
Hybrid
switches
2.5V Regulator
+
POR
Dying Gasp
Tuning Circuit I/V Reference
VCXO
(optional)
CTRL/TST
Interface
RXP3
RXP1
LNA1ab
Bypass
RXN1
RXP2
RX HPF
LNA2
RX LPF
ADC
RXN2 LNA1c
D
I
Bypass
G
I
T
RXN3
5V area
A
L
Loopback
Digital
TXP
TXN
TXLD
TX LPF
DAC
5.2 ST20196
5.2.1 Discrete Multi Tone (DMT) Modulation and Demodulation
The ST20196 includes a digital Quadrature Amplitude Modulation (QAM) mapper/demapper which allows
coding of up to 15 bits per tone. The device incorporates the necessary Inverse- and Fast Fourier Trans-
form (IFFT, FFT), an innovative unique Per Tone Equalizer (PTEQ), echo cancelling (EC), Trellis coding
and decoding plus timing units and a fully digital clock recovery scheme (TDI). These last blocks feature
efficient synchronization algorithms to improve the efficiency of the recovery of data. The ST20196 per-
formances rely on embedded programmable cores.
In ADSL2 mode the modem supports diagnostics modes, enhanced power management modes to reduce
the CO power (L2), 1 bit constellation, relocatable and modulated pilot.
5.2.2 Framing Functions
The ST20196 incorporates framing functions for the generic and ATM Transmission Convergence (TC)
layers. The new TC layer architecture is fully under the control of an embedded controller. This provides
the flexibility to adapt to different framing variants via firmware. The TC consists of data scrambling and
Reed-Solomon error correction with and without inter-leaving. It also includes the rate converter function-
ality as defined in G.dmt Annex C. Several framing variants are implemented (such as interleaved and
non-interleaved modes, full and reduced overhead) to ensure compliance with ANSI T1.413 Issue 2 and
ITU G.992.1 (G.dmt), G.992.2 (G.Lite), G.992.3 and G.992.4.
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