SST25VF512A Ver la hoja de datos (PDF) - Silicon Storage Technology

Número de pieza

componentes Descripción

Fabricante

SST25VF512A

512 Kbit SPI Serial Flash

Silicon Storage Technology 

512 Kbit SPI Serial Flash

SST25VF512A

Read (20 MHz)

The Read instruction outputs the data starting from the

specified address location. The data output stream is con-

tinuous through all addresses until terminated by a low to

high transition on CE#. The internal address pointer will

automatically increment until the highest memory address

is reached. Once the highest memory address is reached,

the address pointer will automatically increment to the

beginning (wrap-around) of the address space, i.e. for

Data Sheet

4 Mbit density, once the data from address location

7FFFFH had been read, the next output will be from

address location 00000H.

The Read instruction is initiated by executing an 8-bit com-

mand, 03H, followed by address bits [A23-A0]. CE# must

remain active low for the duration of the Read cycle. See

Figure 4 for the Read sequence.

CE#

MODE 3

SCK MODE 0

0 1 2345 6 78

15 16

23 24 31 32 39 40 47 48 55 56

63 64 70

SI

03

ADD. ADD. ADD.

MSB

MSB

HIGH IMPEDANCE

SO

N

DOUT

N+1

DOUT

N+2

DOUT

N+3

DOUT

N+4

DOUT

MSB

1264 F04.0

FIGURE 4: READ SEQUENCE

©2006 Silicon Storage Technology, Inc.

9

S71264-02-000

1/06

Share Link: