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SPT7722 Ver la hoja de datos (PDF) - Fairchild Semiconductor

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SPT7722 Datasheet PDF : 12 Pages
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DATA SHEET
SPT7722
Electrical Specifications
(TA = TMin to TMax, AVCC= +5V, OVDD = +5V, ƒclk = 250MHz, 50% duty cycle,
ƒIN = 70MHz, dual channel mode; unless otherwise noted)
Parameter
Conditions
Test
Level
Min.
Clock and Reset Inputs
Diff Signal Amplitude (VDIFF)
Diff High Input Voltage (VIHD)
Diff Low Input Voltage (VILD)
Diff Common Mode Input (VCMD)
SE High Input Voltage (VIH)
SE Low Input Voltage (VIL)
Input Current High (IIH)
Input Current Low (IIL)
Power Down & Mode Control Inputs
High Input Voltage
Low Input Voltage
Max Input Current Low
Max Input Current High <4.0V
Digital Outputs
Logic “1” Voltage
Logic “0” Voltage
TR/TF Data
TR/TF DCLK
(Diff & Single-Ended)
VID = 1.5V
VID = 1.5V
(Single-Ended)
IOH = -0.5mA
IOL = +1.6mA
10pF load
OVDD = 3V
OVDD = 5V
10pF load
OVDD = 3V
OVDD = 5V
IV
400
IV
1.4
IV
0
IV
1.2
IV
1.8
IV
0
VI
–100
VI
–100
IV
2.0
IV
0
VI
–100
VI
–100
VI OVDD-0.2
VI
V
V
V
V
Typ.
43
43
0.5
50
3.3/3.0
2.3/1.9
1.2/1.0
0.7/0.6
Max.
Unit
AVCC
3.9
4.1
1.2
+100
+100
AVCC
1.0
+100
+100
0.2
mVpp
V
V
V
V
V
µA
µA
V
V
µA
µA
V
V
ns
ns
ns
ns
NOTE: All electrical characteristics are subject to the following condition:
All parameters having min/max specifications are guaranteed. The Test Level column indicates the specific devices testing actually performed
during production and quality assurance inspection. Any blank section in the data column indicates that the specification is not tested at the
specified condition.
TEST LEVEL CODES:
Level
I
II
II
IV
V
VI
Test Procedure
100% production tested at the specified temperature.
100% production tested at TA = +25°C and sample tested at the specified temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and characterization data.
Parameter is a typical value for information purposes only.
100% production tested at TA = +25°C. Parameter is guaranteed over specific temperature range.
4
Rev. 1.0.2 December 2002

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