SP6136EB Ver la hoja de datos (PDF) - Signal Processing Technologies

Número de pieza

componentes Descripción

Fabricante

SP6136EB

Evaluation Board Manual

Signal Processing Technologies 

The simple guidelines for positioning the poles and zeros and for calculating the component

values for Type III compensation are as follows:

R1 = 68.1K

R2 = 0.8 × R1 (sets output voltage)

Vout − 0.8

1

CZ 3 =

(sets first zero)

1

ZSF × R1×

LC

( ) RZ 2 = (6.28 × fc)2 × L × Cout +1 × Vramp (sets the cross-over frequency, fc)

6.28 × fc × CZ3

Vin

1

CZ 2 =

(sets second zero)

1

ZSF × RZ 2 ×

LC

1

CP1 =

(sets first high-frequency pole)

6.28 × fs × RZ 2

1

RZ 3 =

(sets second high-frequency pole)

6.28 × fs × CZ3

Where ZSF=(f compensation double zero)/(f circuit double pole)

Here ZSF is set at 0.8.

As a particular example, consider for the following SP6136EB, 7AMAX with a type III Voltage

Loop Compensation component selections:

Vin = 12V

Vout = 3.30V @ 0 to 7A load

Select L = 2.2 uH => 30% current ripple.

Select Cout = 100uF Ceramic capacitor (Resr ≈ 5mΩ)

fs = 600KHz SP6136ER1 internal Oscillator Frequency

Vramp_pp = 1.0V SP6136ER1 internal Ramp Peak to Peak Amplitude

Rev 5/01/06

SP6136 Evaluation Manual

Page 6 of 9

Copyright © 2006 Sipex Corporation

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