AD9873 Ver la hoja de datos (PDF) - Analog Devices
Número de pieza
componentes Descripción
Fabricante
AD9873 Datasheet PDF : 39 Pages
| |||
PIN FUNCTION DESCRIPTIONS
Pin No. Mnemonic
Pin Function
1, 84, 87
92, 95
2, 21, 70
3, 22, 72
4–15
AVDD
DRGND
DRVDD
IF11–IF0
16–19
20
Rx IQ 3
–Rx IQ 0
Rx SYNC
23
MCLK
24, 33, 38 DVDD
25, 34,
39, 40
DGND
26
Tx SYNC
27–32
Tx IQ 5
–Tx IQ 0
35, 36
37
PROFILE[1:0]
RESET
41
SCLK
42
CS
43
SDIO
44
SDO
45
DGND Tx
46
DVDD Tx
47
PWR DOWN
48
REFIO
49
FSADJ
50
AGND Tx
51
Tx–
52
Tx+
53
AVDD Tx
54
DGND PLL
55
DVDD PLL
56
AVDD PLL
57
PLL FILTER
58
AGND PLL
59
DGND OSC
60
XTAL
61
OSC IN
62
DVDD OSC
63
CA CLK
Analog Supply Voltage
10-/12-Bit ADC
Pin Driver Digital Ground
Pin Driver Digital Supply Voltage
Multiplexed Output of IF10-
and IF12-Bit ADCs
Multiplexed Output of I and
Q 8-Bit ADCs
Demultiplexer Synchronization
Output for IF and IQ ADCs
Master Clock Output
Demultiplexer
Digital Supply Voltage
Digital Ground
Synchronization Input for
Transmitter
Multiplexed I and Q Input
Data for Transmitter (Two’s
Complement)
Profile Selection Inputs
Master Reset Input, Reset applies
for all Interfaces and Registers
Serial Interface Input Clock
Serial Interface Chip Select
Serial Interface Data I/O
Serial Interface Data Output
Digital Ground Tx Section
Digital Supply Voltage Tx
Transmit Power-Down
Control Input
DAC Bandgap requires 0.1 µF
Capacitor to Ground
Full-Scale DAC Current Output
Adjust with External Resistor
Analog Ground Tx Section
Transmitter DAC Output–
Transmitter DAC Output+
Analog Supply Voltage Tx
PLL Digital Ground
PLL Digital Supply Voltage
PLL Analog Supply Voltage
PLL Loop Filter Connection
PLL Analog Ground
Digital Ground Oscillator
Crystal Oscillator Inv. Output
Oscillator Clock Input
Digital Supply Oscillator
Cable Amplifier Control
Clock Output
AD9873
Pin No. Mnemonic
64
CA DATA
65
CA ENABLE
66
DVDD SD
67
SDELTA1
68
SDELTA0
69
DGND SD
71
REF CLK
73
AVDD IQ
74, 77, 80 AGND IQ
75
REFB8
76
REFT8
78
I IN–
79
I IN+
81
Q IN–
82
Q IN+
83, 88, 91, AGND
96, 99
85
REFB10
86
REFT10
89
IF10–
90
IF10+
93
REFB12
94
REFT12
97
IF12–
98
IF12+
100
VIDEO IN
Pin Function
Cable Amplifier Control Data
Output
Cable Amplifier Control Enable
Output
Supply Voltage Sigma Delta
Sigma Delta Output Stream 1
Sigma Delta Output Stream 0
Ground Sigma Delta
Programmable Reference Clock
Output Derived from MCLK
Analog Supply 8-Bit ADCs
Analog Ground 8-Bit ADCs
Bottom Reference Decoupling
IQ 8-Bit ADC’s Reference
Top Reference Decoupling
IQ 8-Bit ADC’s Reference
Inverting I Analog Input
Noninverting I Analog Input
Inverting Q Analog Input
Noninverting Q Analog Input
Analog Ground 10-/12-Bit ADC
Bottom Reference Decoupling
IF 10-Bit ADC’s Reference
Top Reference Decoupling
IF 10-Bit ADC’s Reference
Noninverting IF10 Analog Input
Inverting IF10 Analog Input
Bottom Reference Decoupling
IF 12-Bit ADC’s Reference
Top Reference Decoupling
IF 12-Bit ADC’s Reference
Inverting IF12 Analog Input
Noninverting IF12 Analog Input
Single-Ended Video Input
REV. 0
–9–
Share Link: 