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TOP242 Ver la hoja de datos (PDF) - Power Integrations, Inc

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TOP242 Datasheet PDF : 52 Pages
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TOP242-250
CURRENT LIMIT (X) pin (Y, R or F package) or MULTI- input voltage operating range (UV low threshold). If the UV
FUNCTION (M) pin (P or G package) and the rectified DC low threshold is reached during operation without the power
high voltage bus, the current limit is reduced with increasing supply losing regulation the device will turn off and stay off
line voltage, allowing a true power limiting operation against until UV (high threshold) has been reached again. If the power
line variation to be implemented. When using an RCD clamp, supply loses regulation before reaching the UV low threshold,
this power limiting technique reduces maximum clamp the device will enter auto-restart. At the end of each auto-
voltage at high line. This allows for higher reflected voltage restart cycle (S7), the UV comparator is enabled. If the UV high
designs as well as reducing clamp dissipation.
threshold is not exceeded the MOSFET will be disabled during
the next cycle (see Figure 8). The UV feature can be disabled
The leading edge blanking circuit inhibits the current limit independent of OV feature as shown in Figures 19 and 23.
comparator for a short time after the output MOSFET is turned
on. The leading edge blanking time has been set so that, if a Line Overvoltage Shutdown (OV)
power supply is designed properly, current spikes caused by The same resistor used for UV also sets an overvoltage thresh-
primary-side capacitances and secondary-side rectifier reverse old which, once exceeded, will force TOPSwitch-GX output
recovery time should not cause premature termination of the into off-state. The ratio of OV and UV thresholds is preset at
switching pulse.
4.5 as can be seen in Figure 11. When the MOSFET is off, the
General rIenctiffioedrDmC haightivooltange &surgeTcaapbabilleity ios ifncrCeasoedntottheents
The current limit is lower for a short period after the leading voltage rating of the MOSFET (700 V), due to the absence of
edge blanking time as shown in Figure 52. This is due to
dynamic characteristics of the MOSFET. To avoid triggering
the reflected voltage and leakage spikes on the drain. A small
amount ofPhyrstoeredsius ics ptroSvideedleoncthteoOrV Gthreushiodldeto 1
the current limit in normal operation, the drain current wave- prevent noise triggering. The OV feature can be disabled
form should stay within the envelope shown.
independent of the UV feature as shown in Figures 18 and 32.
Data Sheets 2
Line Under-Voltage Detection (UV)
At power up, UV keeps TOPSwitch-GX off until the input line
voltage reaches the under voltage threshold. At power down,
Line Feed Forward with DCMAX Reduction
The same resistor used for UV and OV also implements line
Application Notes voltage feed forward which minimizes output line ripple and 3
UV prevents auto-restart attempts after the output goes out of reduces power supply output sensitivity to line transients. This
regulation. This eliminates power down glitches caused by
the slow discharge of large input storage capacitor present in
applications such as standby supplies. A single resistor
feed forward operation is illustrated in Figure 7 by the
Design Ideas 4 different values of IL (Y, R or F package) or IM (P or G Pack-
age). Note that for the same CONTROL pin current, higher
connected from the LINE-SENSE pin (Y, R or F package) or
MULTI-FUNCTION pin (P or G package) to the rectified DC
high voltage bus sets UV threshold during power up. Once the
line voltage results in smaller operating duty cycle. As an added
Design Tools 5 feature, the maximum duty cycle DCMAX is also reduced from
78% (typical) at a voltage slightly higher than the UV thresh-
power supply is successfully turned on, the UV threshold is
lowered to 40% of the initial UV threshold to allow extended
old to 30% (typical) at the OV threshold (see Figures 7 and
11). LimitinQg DuCaMAlXitayt haignhedr liRneevloilatagbesilhietlyps 6
Package Information 7
Oscillator
(SAW)
DMAX
Enable from
X, L or M Pin (STOP)
DPA-Switch DC-DC Seminar 8
LinkSwitch & TinySwitch-II AC-DC Seminar 9
TOPSwitch-GX AC-DC Seminar 10
Sales Representatives and DistTrimiebutors 11
Figure 10. Synchronization Timing Diagram.
8
H
9/02
PI-2637-060600

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