AN87C196CA18 Ver la hoja de datos (PDF) - Intel
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AN87C196CA18 Datasheet PDF : 30 Pages
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Automotive — 87C196CA 18 MHz Microcontroller
2.3.3
2.3.4
TIJMP
Table Indirect JUMP. This instruction incorporates a way to do complex CASE level branches
through one instruction. An example of such code savings: several interrupt sources and only one
interrupt vector. The TIJMP instruction will sort through the sources and branch to the appropriate
sub-code level in one instruction. This instruction was added especially for the EPA structure, but
has other code saving advantages.
EPTS/DPTS
Enable and Disable PTS Interrupts (Works like EI and DI).
2.4
SFR Operation
The 87C196CA device contains 512 bytes of SFR registers to support the wide range of on-chip
peripherals. The memory space 1F00-1FFFh has the ability to be addressed as direct 8-bit
addresses through the “windowing” technique. The memory space 1E00-1EFFh is reserved for
CAN functions.
Figure 1. Block Diagram
XTAL1 XTAL2
Clock Generator
Peripheral Register
Transaction RAM
ALU
Server (PTS)
Code
RAM
On-chip
EPROM
(optional)
16
Memory
Controller with
Prefetch Queue
16
Power
and
GND
VCC
VSS
VSS
VSS
Control Signals
ADDR/
Data Bus
VREF
ANGND
A/D Converter
(10-Bit)
[8 Channels]
Programmable
Interrupt
Controller
Serial I/O
(UART & SSIO)
Timer 1 & 2
Event Processor
Array (EPA)
I/O Ports
A4643-01
Datasheet
3
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