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AN87C196CA18

Advanced 16-Bit CHMOS Microcontroller

Intel 

Automotive — 87C196CA 18 MHz Microcontroller

1.0

Introduction

Table 1.

The MCS 96 microcontroller family members are all high performance microcontrollers with a

16-bit CPU.

The 87C196CA family members are composed of the high-speed (18 MHz) core as well as the

following peripherals:

• 32 Kbytes of Programmable EPROM

• 1.0 Kbytes of register RAM and 512 bytes of code RAM (16-bit addressing modes) with the

ability to execute from this RAM space

• Six–10-Bit/ ± 3 LSB analog to digital converter with programmable S/H times with

conversion times < 5 µs at 16 MHz

• An asynchronous/synchronous serial I/O port (8096 compatible) with a dedicated 16-bit baud

rate generator

• Interprocessor communication slave port

• Synchronous serial I/O port with full duplex master/slave transceivers

• A flexible timer/counter structure with prescaler, cascading, and quadrature capabilities

• Six modularized multiplexed high speed I/O for capture and compare (called Event Processor

Array) with 250 ns resolution and double buffered inputs

• A sophisticated prioritized interrupt structure with programmable Peripheral Transaction

Server (PTS). The PTS has several channel modes, including single/burst block transfers from

any memory location to any memory location, a PWM and PWM toggle mode to be used in

conjunction with the EPA, and an A/D scan mode.

• Serial communications protocol CAN 2.0 with 15 message objects of 8 bytes data length

The 87C196CA device is a member of the fourth generation of MCS® 96 microcontroller products

implemented on Intel’s advanced 1 micron process technology. This product is based on the

80C196KB device with improvements for automotive applications. The instruction set is a true

super set of 80C196KB.

The 87C196CA device is a memory scalar of the 87C196KR in a 68-pin package with 32 Kbytes of

on-chip EPROM, 1.0 Kbytes of register RAM, and 256 bytes of code RAM. In addition, the

87C196CA contains an extra peripheral for serial communications protocol CAN 2.0.

Table 1 summarizes the features of the 87C196CA device.

87C196Kx and Jx Features Summary

Device

Pins/Package

87C196CA 68-Pin PLCC

EPROM Reg RAM Code RAM I/O EPA SIO SSIO A/D

32 K

1.0 K

256

38 6

Y

Y

6

Datasheet

1

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