DS2405P(1999) Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS2405P
(Rev.:1999)

Addressable Switch

Dallas Semiconductor -> Maxim Integrated 

ORDERING INFORMATION

DS2405

TO-92 package

DS2405Z 4-pin SOT-223 package

DS2405P 6-pin TSOC package

DS2405T Tape & Reel version of DS2405

DS2405Y Tape & Reel version of DS2405Z

DS2405V Tape & Reel version of DS2405P

DS2405

DESCRIPTION

The DS2405 Addressable Switch is an open drain N-channel transistor that can be turned on or off by

matching the 64-bit factory-lasered registration number within each part. The 64-bit number consists of

an 8-bit family code, a unique 48-bit serial number, and an 8-bit cyclic redundancy check.

Communication with the DS2405 follows the standard Dallas Semiconductor 1-Wire protocol and can be

accomplished with a single port pin of a microcontroller. Multiple DS2405 devices can reside on a

common 1-Wire bus creating a MicroLAN. The network controller circuitry is embedded within the chip

including a search algorithm to determine the identity of each DS2405 on the network. The open drain

output (PIO pin) for each DS2405 on the MicroLan can be independently toggled on or off whether there

is one or many devices sharing the same 1-Wire bus. The logic level of the PIO pin for each device on the

MicroLan can also be individually sensed and reported to the bus master.

OVERVIEW

The DS2405 Addressable Switch provides a means for assigning an electronically readable identification

to a particular node or location with additional control capability provided by an open drain N-channel

MOSFET that can be remotely switched and sensed via communication over the 1-Wire bus. The DS2405

contains a factory-lasered registration number that includes a unique 48-bit serial number, an 8-bit CRC,

and an 8-bit family code (05h). The 64-bit ROM portion of the DS2405 not only creates an absolutely

unique electronic identification for the device itself but also is a means to locate and change or obtain the

state of the switch that is associated with the 64-bit ROM. The structure of the 64-bit ROM is shown in

Figure 1. The device derives its power entirely from the 1-Wire bus by storing energy on an internal

capacitor during periods of time when the signal line is high and continues to operate off of this “parasite”

power source during the low times of the 1-Wire line until it returns high to replenish the parasite

(capacitor) supply. The DS2405 uses the standard Dallas Semiconductor 1-Wire protocol for data

transfers, with all data being read and written least significant bit first. Communication to and from the

DS2405 requires a single bidirectional line that is typically the port pin of the microcontroller. The 1-

Wire bus master (microcontroller) must first issue one of five ROM function commands: 1) Read ROM,

2) Match ROM, 3) Search ROM, 4) Skip ROM, and 5) Active-Only Search ROM. These commands

operate on the 64-bit lasered ROM portion of each device and can singulate a specific device if many are

present on the 1-Wire line as well as indicate to the bus how many and what type of each device is

present. The protocol required for these ROM function commands is described in Figure 4. After a ROM

function command is successfully executed, the open drain output can be toggled or its current status

determined via the 1-Wire bus.

1-WIRE BUS SYSTEM

The 1-Wire bus is a system which has a single bus master and one or more slaves. In all instances, the

DS2405 is a slave device. The bus master is typically a microcontroller. The discussion of this bus system

is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire signaling

(signal type and timing). For a more detailed protocol description, refer to Chapter 4 of the Book of

DS19xx iButton Standards.

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