Advanced Information
DATA SETUP AND HOLD (50pF EXTERNAL LOAD)
t
SETUP
BIT_CLK
SYNC
SDATA_OUT
tHOLD
WM9707
Figure 5 Data Setup and Hold (50pF External Load)
Note: Setup and hold time parameters for SDATA_IN are with respect to AC’97 Controller.
PARAMETER
Setup to falling edge of BIT_CLK
Hold from falling edge of BIT_CLK
SYMBOL
tSETUP
tHOLD
MIN
15.0
5.0
TYP
MAX
UNIT
ns
ns
SIGNAL RISE AND FALL TIMES
triseCLK
BIT_CLK
triseSYNC
SYNC
triseDIN
SDATA_IN
triseDOUT
SDATA_OUT
tfallCLK
tfallSYNC
tfallDIN
tfallDOUT
Figure 6 Signal Rise and Fall Times (50pF external load)
PARAMETER
BIT_CLK rise time
BIT_CLK fall time
SYNC rise time
SYNC fall time
SDATA_IN rise time
SDATA_IN fall time
SDATA_OUT rise time
SDATA_OUT fall time
SYMBOL
triseCLK
tfallCLK
triseSYNC
tfallSYNC
triseDIN
triseDIN
triseDOUT
tfallDOUT
MIN
2
2
2
2
2
2
2
2
TYP
MAX
6
6
6
6
6
6
6
6
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
WOLFSON MICROELECTRONICS LTD
AI Rev 2.2 January 2001
9