SM5847 Ver la hoja de datos (PDF) - Nippon Precision Circuits
Número de pieza
componentes Descripción
Fabricante
SM5847 Datasheet PDF : 30 Pages
| |||
SM5847AF
Reset timing (RSTN)
VDD = VDDAC = 3.00 to 5.25 V, VSS = VSSAC = 0 V, Ta = −40 to 85 °C
Parameter
Symbol
Condition
R S T N L OW -level reset pulsewidth
tR S T
1. tM C K is equal to 1/fXTI or 1/fO S C. For example, tR S T = 54 ns when fXTI = 37 MHz.
Rating
Unit
min1
typ
max
2tM C K
–
–
ns
RSTN
1.5V
tRST
Output timing (CKO, BCKO, WCKO, DOL, DOR, DG)
VDD = VDDAC = 4.75 to 5.25 V, VSS = VSSAC = 0 V, Ta = −40 to 70 °C, CL = 50 pF
Parameter
Symbol
Condition
Rating
Unit
min
typ
max
4
–
9
ns
XTI falling edge to CKO falling edge delay
tX T O
V DD = V DDAC = 3.00 to 5.25 V,
Ta = −40 to 85 °C
4
–
11
ns
B C KO falling edge to W C KO , DOL, DOR,
DG delay
tB D O
−4
–
2
ns
B C KO rising edge to W C KO falling edge
tW O H
8
–
Output mode: 8fs
W C K O falling edge to BCKO rising edge
tW O S
OMD = HIGH (fs = 192 kHz)
8
–
BCKO period
tO B C Y
External clock input:
XTI = 27 ns (37 MHz),
27
–
BCKO HIGH-level pulsewidth
B C KO LOW -level pulsewidth
tO B C H
tO B C L
CKSLN = HIGH (192fs)
Divider ratio: 1
C K DV1 = CKDV2 = LOW
7
–
7
–
DOL, DOR setup time
tO D S
Output data length: 24 bits
OW1N = OW2N = LOW
7
–
DOL, DOR hold time
tO D H
7
–
B C KO rising edge to W C KO falling edge
tW O H
17
–
Output mode: 4fs
W C K O falling edge to BCKO rising edge
tW O S
OMD = LOW (fs = 192 kHz)
17
–
BCKO period
tO B C Y
External clock input:
XTI = 27 ns (37 MHz),
54
–
BCKO HIGH-level pulsewidth
B C KO LOW -level pulsewidth
tO B C H
tO B C L
CKSLN = HIGH (192fs)
Divider ratio: 1
C K DV1 = CKDV2 = LOW
18
–
18
–
DOL, DOR setup time
tO D S
Output data length: 24 bits
OW1N = OW2N = LOW
18
–
DOL, DOR hold time
tO D H
18
–
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
NIPPON PRECISION CIRCUITS—9
Share Link: 