SM5847AF
PIN DESCRIPTION
Number
Name
I/O
1
OMD
Ip1
2
DOR
O2
3
DOL
O2
4
WCKO
O2
5
BCKO
O2
6
VSS
–
7
VSSAC
–
8
VDDAC
–
9
VDD
–
10
DG
O2
11
NC
–
12
CKO
O2
13
VSS
–
14
VDD
–
15
XTO
O
16
XTI
I
17
VSS
–
18
VDD
–
19
LRCI
I1
20
DI/INF2N
I1
21
BCKI
I1
22
NC
–
23
NC
–
24
CKSLN
Ip2
25
INF1N
Ip2
26
IW1N/DIL
Ip1
27
IW2N/DIR
Ip1
28
VSS
–
29
VDD
–
30
OW1N
Ip2
31
OW2N
Ip2
32
SYNCN
Ip2
33
RSTN
Ip1
34
CKDV1
Ip1
35
CKDV2
Ip1
36
DEMPR
Ip1
37
DEMPL
Ip1
38
VDD
–
39
VSS
–
40
FSEL1
Ip1
41
FSEL2
Ip1
42
MUTEL
Ip1
43
MUTER
Ip1
44
DITHN
Ip1
1. Schmitt input, TTL level
2. TTL level
Ip = Pull-up input
Description
Output data rate (4fs/8fs) select pin
Right-channel data output
Left-channel data output
W ord clock output
Bit clock output
Ground
Ground
Supply voltage
Supply voltage
Deglitched signal output
No internal connection (must be open)
Master clock output
Ground
Supply voltage
Oscillator output
Oscillator input/master clock input
Ground
Supply voltage
Input data sample rate (fs) clock input
Data input/input format select pin 2
Bit clock input
No internal connection (must be open)
No internal connection (must be open)
Master clock frequency (192fs/256fs) select pin
Input format select pin 1
Input data word length select pin 1/left-channel data input
Input data word length select pin 2/right-channel data input
Ground
Supply voltage
Output data word length select pin 1
Output data word length select pin 2
Sync mode select pin
Reset input
Internal system clock frequency divider set pin 1
Internal system clock frequency divider set pin 2
Right-channel deemphasis ON/OFF pin
Left-channel deemphasis ON/OFF pin
Supply voltage
Ground
Deemphasis filter sample rate (fs) select pin 1
Deemphasis filter sample rate (fs) select pin 2
Left-channel mute ON/OFF pin
Right-channel mute ON/OFF pin
Output data dither ON/OFF pin
NIPPON PRECISION CIRCUITS—4