SLA7062 Ver la hoja de datos (PDF) - Allegro MicroSystems
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SLA7062 Datasheet PDF : 16 Pages
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SLA7060M THRU SLA7062M
UNIPOLAR STEPPER-MOTOR
TRANSLATOR/DRIVERS
Electrical characteristics: unless otherwise noted at TA = +25°C, VBB = 24 V, VDD = 5.0 V.
Limits
Characteristic
Symbol Test Conditions
Min. Typ. Max.
Output drivers
Driver Supply Volt. Range
Drain-Source Breakdown
Output On Resistance
Body Diode Forward Volt.
Driver Supply Current
Control logic
VBB
V(BR)DS
rDS(on)
VF
IBB
Operating
VBB = 44 V, ID = 1 mA
SLA7060M, IO = 1.0 A
SLA7061M, IO = 2.0 A
SLA7062M, IO = 3.0 A
SLA7060M, IF = 1.0 A
SLA7061M, IF = 2.0 A
SLA7062M, IF = 3.0 A
VREF > 2.0 V (sleep mode)
10
—
44
100
—
—
—
700
850
—
250
400
—
180
240
—
0.85
1.1
—
0.95
TBD
—
0.95
TBD
—
—
15
—
—
100
Logic Supply Volt. Range
Logic Input Voltage
Logic Input Current
VDD
Operating
VIH
VIL
IIH
IIL
CLOCK, RESET, CW/CCW, and SYNC.
M1 and M2
3.0
0.75VDD
—
—
—
-25
5.0
—
—
±1.0
±1.0
-50
5.5
—
0.25VDD
—
—
-75
Max. Clock Frequency
PWM Off Time
PWM Min. On Time
Ref. Input Voltage Range
Ref. Input Current
Monitor Output Voltage
Monitor Output Current
Sense Voltage
Sense Input Current
Propagation Delay Time
Logic Supply Current
fclk
toff
ton(min)
VREF
IREF
VMoH
VMoL
IMo
VS
ISENSE
tPLH
tPHL
IDD
70 to 100%Itripmax
38 to 64%Itripmax
9 to 30%Itripmax
Operating
Sleep mode
Trip point at 100% IO
Clock rising edge to output on
Clock rising edge to output off
250*
—
—
12
—
9.0
—
7.0
—
1.8
0
—
2.0
—
—
±10
VDD - 1.25 —
—
—
—
—
0.95VREF VREF
—
±10
—
2.0
—
1.5
—
—
—
—
—
—
—
1.5
VDD
—
—
1.25
±3.0
1.05VREF
—
—
—
4.0
Typical values are given for circuit design information only.
*Operation at a clock frequency greater than the specified minimum value is possible but not warranted.
Units
V
V
mΩ
mΩ
mΩ
V
V
V
mA
µA
V
V
V
µA
µA
µA
kHz
µs
µs
µs
µs
V
V
µA
V
V
mA
V
µA
µs
µs
mA
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