SL3522 Ver la hoja de datos (PDF) - Zarlink Semiconductor Inc
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SL3522 Datasheet PDF : 21 Pages
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SL3522
PRODUCT DESCRIPTION
The SL3522 is a complete monolithic successive detection
Log/limiting amplifier which can operate over an input
frequency range of 100MHz to 500MHz. Producing a log/lin
characteristic for input signals between -64dBm and +6dBm,
the log amplifier can provide an accuracy of better than
±1.00dB at case temperatures of -55°C and +25°C and an
accuracy of better than ±1.25dB at +125°C. The dynamic
range is better than 75dB over a frequency range of 100MHz
to 400MHz. The graph in fig 4 shows how the dynamic range
is guaranteed over frequency.
The SL3522 consists of 6 Gain stages, 7 Detector stages,
a limiting RF Output buffer and a Video Output amplifier. The
power supply connections to each section are isolated from
each other to aid stability.
The SL3522 consumes 1.1W of power when ALL parts of
the circuit are powered up from a ±5.0V power supply. As the
circuit uses a differential architecture, the power consumption
of the RF gain/detector stages and RF Output Buffer will be
independent of RF input signal level. However, the Video
Output (pin 13) is driven by a single ended emitter follower and
so the power consumption of the Video amplifier will vary with
RF input signal level between pins 27 and 28.(upto 10mA over
2V video output range with max video load of 200Ω //20pF) The
SL3522 has a high RF gain (>50dB) across a wide bandwidth
(>450MHz) when the limiting RF Output Buffer is enabled. The
limiting RF Output Buffer provides a balanced Limited Output
level of nominally –1.0dBm on each RF Output connection (pin
9 and 10), for RF input signal levels on pins 27 and 28 in excess
of –50dBm.
The limiting RF Output Buffer can be isolated from the
other sections of the SL3522, by disconnecting the RF Output
Buffer GND (pin 8) from 0V, and leave the pin floating. This
feature aids stability in applications NOT requiring a Limited RF
Output signal, and lowers the power consumption of the
SL3522 to 0.95Watts, when the other sections are powered up
from a ±5.0V power supply.
Each of the Gain and Detector stages has approximately
12dB of gain, and a significant amount of on-chip RF
decoupling (200pF per stage), also to aid stability. The Video
amplifier provides a positive going output signal proportional to
the log of the amplitude of an RF input applied between pins 27
and 28. The gain and the offset of the Video amplifier can be
adjusted by 3 resistors; RG , RT , and RO which are connected
to Gain adjust (pin 19),Trim reference (pin 18) and Offset
adjust (pin 17). With RT set to 1.5kΩ , RG can be set to any value
between 1kΩ and 2k2Ω and achieve a range in Video Slope of
±20%, centred on 21mV/dB. Similarly, RO can be set to any
value between 1kΩ and 2.2KΩ and achieve an offset range of
±0.5V, which should allow the Video Offset to be trimmed to 0V
if required.
The RF input pins (27 and 28) have a 50Ω terminating
resistor connected between them on–chip. These are
capacitively coupled to the I/P gain stage with 20pF on-chip
capacitors. (Refer to APPLICATION NOTES section for
information on how to connect an RF input signal to the device).
Minimum
guaranteed
dynamic
range (dB)”
100
90
80
70
60
50
40
30
20
10
0
–55°C
+25°C
+125°C
100
200
300
400
500
600
700
800
Fig.4 Plot showing guaranteed dynamic range v. frequency
(typical achievable dynamic range lines indicated across temperature)
4
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