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SI4113-BM

DUAL-BAND RF S YNTHESIZER WITH INTEGRATED VCOS FOR WIRELESS COMMUNICATIONS

Unspecified 

Si4133

Table 5. RF and IF Synthesizer Characteristics (Continued)

(VDD = 2.7 to 3.6 V, TA = –40 to 85°C)

Parameter1

Symbol Test Condition

Min Typ Max Unit

RF1 Harmonic Suppression

Second Harmonic

—

–26 –20

dBc

RF2 Harmonic Suppression

—

–26 –20

dBc

IF Harmonic Suppression

—

–26 –20

dBc

RFOUT Power Level

RFOUT Power Level2

ZL = 50 Ω

–8

–3

ZL = 50 Ω, RF1 active, –14

–7

Extended frequency

operation

1

dBm

1

dBm

IFOUT Power Level

ZL = 50 Ω

–8

–4

0

dBm

RF1 Output Reference Spurs

Offset = 200 kHz

—

–65

—

dBc

Offset = 400 kHz

—

–71

—

dBc

Offset = 600 kHz

—

–75

—

dBc

RF2 Output Reference Spurs

Offset = 200 kHz

—

–65

—

dBc

Offset = 400 kHz

—

–71

—

dBc

Offset = 600 kHz

—

–75

—

dBc

Power Up Request to Synthesizer

Ready3 Time

tpup

Figures 4, 5

—

40/fφ 50/fφ

Power Down Request to Synthesizer

tpdn

Off4 Time

Figures 4, 5

—

—

100

ns

Notes:

1. fφ = 200 kHz, RF1 = 1.6 GHz, RF2 = 1.2 GHz, IFOUT = 550 MHz, LPWR = 0, for all parameters unless otherwise noted.

2. Extended frequency operation only. VDD ≥ 3.0 V, MLP only, VCO Tuning Range fixed by directly shorting the RFLA and

RFLB pins. See Application Note 41 for more details on the Si4133 extended frequency operation.

3. From power up request (PWDNB↑ or SENB↑ during a write of 1 to bits PDIB and PDRB in Register 2) to RF and IF

synthesizers ready (settled to within 0.1 ppm frequency error).

4. From power down request (PWDNB↓, or SENB↑ during a write of 0 to bits PDIB and PDRB in Register 2) to supply

current equal to IPWDN.

Rev. 1.1

9

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