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SI3201-BS

PROSLIC® PROGRAMMABLE CMOS SLIC WITH RINGING/BATTERY VOLTAGE GENERATION

Silicon Laboratories 

Si3230

9

8

7

6

Fundamental

Output Power 5

(dBm0)

4

3

2.6

2

1

Acceptable

Region

0 123456789

Fundamental Input Power (dBm0)

Figure 1. Overload Compression Performance

Table 4. Linefeed Characteristics

(VDDA, VDDD = 3.13 to 5.25 V, TA = 0 to 70°C for K-Grade, –40 to 85°C for B-Grade)

Parameter

Symbol

Test Condition

Min Typ Max Unit

Loop Resistance Range

RLOOP

See note.*

0

—

160

Ω

DC Loop Current Accuracy

ILIM = 29 mA, ETBA = 4 mA

–10

—

10

%

DC Open Circuit Voltage

Accuracy

Active Mode; VOC = 48 V,

–4

—

4

V

VTIP – VRING

DC Differential Output

RDO

Resistance

ILOOP < ILIM

—

160

—

Ω

DC Open Circuit Voltage—

VOCTO IRING<ILIM; VRING wrt ground

–4

—

4

V

Ground Start

VOC = 48 V

DC Output Resistance—

RROTO

IRING<ILIM; RING to ground

—

160

—

Ω

Ground Start

DC Output Resistance—

Ground Start

RTOTO

TIP to ground

150

—

—

kΩ

Loop Closure/Ring Ground

Detect Threshold Accuracy

ITHR = 11.43 mA

–20

—

20

%

Ring Trip Threshold

Accuracy

ITHR = 40.64 mA

–10

—

10

%

Ring Trip Response Time

User Programmable Register 70 —

—

—

and Indirect Register 36

Ring Amplitude

Ring DC Offset

VTR

5 REN load; sine wave;

44

—

—

Vrms

RLOOP = 160 Ω, VBAT = –75 V

ROS

Programmable in Indirect

0

—

—

V

Register 19

Preliminary Rev. 0.96

7

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